Zenode.ai Logo

74LVT244 Series

8-ch, 2.7-V to 3.6-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Manufacturer: Texas Instruments

Catalog(9 parts)

PartSupplier Device PackagePackage / CasePackage / CasePackage / CaseOutput TypeMounting TypeVoltage - SupplyVoltage - SupplyLogic TypeNumber of ElementsOperating TemperatureOperating TemperatureCurrent - Output High, LowNumber of Bits per Element
Texas Instruments
SN74LVT244BPWR
Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-TSSOP
20-TSSOP
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
3-State
Surface Mount
2.700000047683716 V
3.5999999046325684 V
Buffer, Non-Inverting
2 ul
85 °C
-40 °C
0.03200000151991844 A, 0.06400000303983688 A
4 ul
Texas Instruments
SN74LVT244BDW
Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-SOIC
20-SOIC
0.007493000011891127 m, 0.007499999832361937 m
20-SOIC
3-State
Surface Mount
2.700000047683716 V
3.5999999046325684 V
Buffer, Non-Inverting
2 ul
85 °C
-40 °C
0.03200000151991844 A, 0.06400000303983688 A
4 ul
Texas Instruments
SN74LVT244BPWRG4
Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-TSSOP
20-TSSOP
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
3-State
Surface Mount
2.700000047683716 V
3.5999999046325684 V
Buffer, Non-Inverting
2 ul
85 °C
-40 °C
0.03200000151991844 A, 0.06400000303983688 A
4 ul
Texas Instruments
SN74LVT244BDBR
Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-SSOP
20-SSOP
0.0052999998442828655 m, 0.005308600142598152 m
20-SSOP
3-State
Surface Mount
2.700000047683716 V
3.5999999046325684 V
Buffer, Non-Inverting
2 ul
85 °C
-40 °C
0.03200000151991844 A, 0.06400000303983688 A
4 ul
Texas Instruments
SN74LVT244BNSR
Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-SO
20-SO
0.0052999998442828655 m, 0.005308600142598152 m
20-SOIC
3-State
Surface Mount
2.700000047683716 V
3.5999999046325684 V
Buffer, Non-Inverting
2 ul
85 °C
-40 °C
0.03200000151991844 A, 0.06400000303983688 A
4 ul
Texas Instruments
SN74LVT244BPWG4
Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-TSSOP
20-TSSOP
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
3-State
Surface Mount
2.700000047683716 V
3.5999999046325684 V
Buffer, Non-Inverting
2 ul
85 °C
-40 °C
0.03200000151991844 A, 0.06400000303983688 A
4 ul
Texas Instruments
SN74LVT244BDBRE4
Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-SSOP
20-SSOP
0.0052999998442828655 m, 0.005308600142598152 m
20-SSOP
3-State
Surface Mount
2.700000047683716 V
3.5999999046325684 V
Buffer, Non-Inverting
2 ul
85 °C
-40 °C
0.03200000151991844 A, 0.06400000303983688 A
4 ul
Texas Instruments
SN74LVT244BDWR
Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-SOIC
20-SOIC
0.007493000011891127 m, 0.007499999832361937 m
20-SOIC
3-State
Surface Mount
2.700000047683716 V
3.5999999046325684 V
Buffer, Non-Inverting
2 ul
85 °C
-40 °C
0.03200000151991844 A, 0.06400000303983688 A
4 ul
Texas Instruments
SN74LVT244BPWE4
Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-TSSOP
20-TSSOP
0.004394200164824724 m
0.004399999976158142 m
20-TSSOP
3-State
Surface Mount
2.700000047683716 V
3.5999999046325684 V
Buffer, Non-Inverting
2 ul
85 °C
-40 °C
0.03200000151991844 A, 0.06400000303983688 A
4 ul

Key Features

Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Supports Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Supports Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)

Description

AI
This octal buffer and line driver is designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. The SN74LVT244B is organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. This octal buffer and line driver is designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. The SN74LVT244B is organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.