CDCE937-Q1 Series
Automotive catalog programmable 3-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Automotive catalog programmable 3-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs
| Part | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] | Package / Case | Package / Case | Package / Case | Input | PLL | Grade | Operating Temperature [Max] | Operating Temperature [Min] | Output | Supplier Device Package | Voltage - Supply [Min] | Voltage - Supply [Max] | Divider/Multiplier | Type | Qualification | Number of Circuits | Mounting Type | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Frequency - Max [Max] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CDCE937QPWRQ1 | 1 | 7 | 0.173 in | 4.4 mm | 20-TSSOP | Crystal, LVCMOS | Yes with Bypass | Automotive | 125 °C | -40 °C | LVCMOS | 20-TSSOP | 1.7 V | 1.9 V | Yes/No | Spread Spectrum Clock Driver | AEC-Q100 | 1 | Surface Mount | 230 MHz |
Key Features
• Qualified for Automotive ApplicationsAEC-Q100 Qualified With the Following Results:Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature RangeDevice HBM ESD Classification Level 2Device CDM ESD Classification Level C4BIn-System Programmability and EEPROMSerial Programmable Volatile RegisterNonvolatile EEPROM to Store Customer SettingFlexible Input Clocking ConceptExternal Crystal: 8 MHz to 32 MHzOn-Chip VCXO: Pull Range ±150 ppmSingle-Ended LVCMOS up to 160 MHzFree Selectable Output Frequency up to 230 MHzLow-Noise PLL CoreIntegrated PLL Loop Filter ComponentsLow Period Jitter (Typical 60 ps)Separate Output Supply PinsCDCE937-Q1: 3.3 V and 2.5 VCDCEL937-Q1: 1.8 VFlexible Clock DriverThree User-Definable Control Inputs [S0/S1/S2]; for Example: SSC Selection, Frequency Switching, Output Enable or Power DownGenerates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth™, WLAN, Ethernet™, and GPSGenerates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPsProgrammable SSC ModulationEnables 0-PPM Clock Generation1.8-V Device Power SupplyWide Temperature Range –40°C to 125°CPackaged in TSSOPDevelopment and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)APPLICATIONSClustersHead UnitsNavigation SystemsAdvanced Driver Assistance Systems (ADAS)All other trademarks are the property of their respective owners.Qualified for Automotive ApplicationsAEC-Q100 Qualified With the Following Results:Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature RangeDevice HBM ESD Classification Level 2Device CDM ESD Classification Level C4BIn-System Programmability and EEPROMSerial Programmable Volatile RegisterNonvolatile EEPROM to Store Customer SettingFlexible Input Clocking ConceptExternal Crystal: 8 MHz to 32 MHzOn-Chip VCXO: Pull Range ±150 ppmSingle-Ended LVCMOS up to 160 MHzFree Selectable Output Frequency up to 230 MHzLow-Noise PLL CoreIntegrated PLL Loop Filter ComponentsLow Period Jitter (Typical 60 ps)Separate Output Supply PinsCDCE937-Q1: 3.3 V and 2.5 VCDCEL937-Q1: 1.8 VFlexible Clock DriverThree User-Definable Control Inputs [S0/S1/S2]; for Example: SSC Selection, Frequency Switching, Output Enable or Power DownGenerates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth™, WLAN, Ethernet™, and GPSGenerates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPsProgrammable SSC ModulationEnables 0-PPM Clock Generation1.8-V Device Power SupplyWide Temperature Range –40°C to 125°CPackaged in TSSOPDevelopment and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)APPLICATIONSClustersHead UnitsNavigation SystemsAdvanced Driver Assistance Systems (ADAS)All other trademarks are the property of their respective owners.
Description
AI
The CDCE937-Q1 and CDCEL937-Q1 devices are modular, phase-locked loop (PLL) based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCEx937-Q1 for their own specifications.
The CDCEx937-Q1 generates up to seven output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS as these platforms are evolving into smaller and more cost effective systems.
Furthermore, each output can be programmed in-system for any clock frequency up to 230 MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.
Customization of frequency programming and SSC are accessed using three user-defined control pins. This eliminates the additional interface requirement to control the clock. Specific power-up and power-down sequences can also be defined to the userΩs needs.
The CDCE937-Q1 and CDCEL937-Q1 devices are modular, phase-locked loop (PLL) based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCEx937-Q1 for their own specifications.
The CDCEx937-Q1 generates up to seven output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS as these platforms are evolving into smaller and more cost effective systems.
Furthermore, each output can be programmed in-system for any clock frequency up to 230 MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.
Customization of frequency programming and SSC are accessed using three user-defined control pins. This eliminates the additional interface requirement to control the clock. Specific power-up and power-down sequences can also be defined to the userΩs needs.