ADC12D800 Series
12-Bit, Dual 800-MSPS or Single 1.6-GSPS, RF Sampling Analog-to-Digital Converter (ADC)
Manufacturer: Texas Instruments
Catalog(1 parts)
| Part | Voltage - Supply, Digital▲▼ | Voltage - Supply, Digital▲▼ | Ratio - S/H:ADC | Architecture | Number of A/D Converters▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Supplier Device Package | Reference Type | Voltage - Supply, Analog▲▼ | Voltage - Supply, Analog▲▼ | Configuration | Sampling Rate (Per Second)▲▼ | Mounting Type | Data Interface | Number of Bits▲▼ | Package / Case | Input Type | Features | Number of Inputs▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments ADC12D800RFIUT/NOPB12 Bit Analog to Digital Converter 2 Input 2 Folding Interpolating 292-BGA (27x27) | 1.7999999523162842 V | 2 V | 1:1 | Folding Interpolating | 2 ul | -40 °C | 85 °C | 292-BGA | Internal | 1.7999999523162842 V | 2 V | MUX-S/H-ADC | 1600000000 Ω | Surface Mount | LVDS - Parallel | 12 ul | 292-BBGA | Differential | Simultaneous Sampling | 2 ul |
Key Features
• Excellent Noise and Linearity up to and Above fIN= 2.7 GHzConfigurable to Either 1.6/1.0 GSPS Interleaved or 800/500 MSPS Dual ADCNew DESCLKIQ Mode for High Bandwidth, High Sampling Rate AppsPin-Compatible with ADC1xD1x00AutoSync Feature for Multi-Chip SynchronizationInternally Terminated, Buffered, Differential Analog InputsInterleaved Timing Automatic and Manual Skew AdjustTest Patterns at Output for System DebugTime Stamp Feature to Capture External TriggerProgrammable Gain, Offset, and tADAdjust Feature1:1 Non-Demuxed or 1:2 Demuxed LVDS OutputsKey SpecificationsResolution 12 BitsInterleaved 1.6/1.0 GSPS ADCIMD3(Fin = 2.7GHz @ -13dBFS): -63/-61 dBc (typ)IMD3(Fin = 2.7GHz @ -16dBFS): -71/-69 dBc (typ)Noise Floor: -152.2/-150.5 dBm/Hz (typ)Noise Power Ratio: 50.4/50.7 dB (typ)Power: 2.50/2.02 W (typ)Dual 800/500 MSPS ADC, Fin = 498 MHzENOB: 9.5/9.6 Bits (typ)SNR: 59.7/59.7 dB (typ)SFDR: 71.2/72 dBc (typ)Power per Channel: 1.25/1.01 W (typ)All trademarks are the property of their respective owners.Excellent Noise and Linearity up to and Above fIN= 2.7 GHzConfigurable to Either 1.6/1.0 GSPS Interleaved or 800/500 MSPS Dual ADCNew DESCLKIQ Mode for High Bandwidth, High Sampling Rate AppsPin-Compatible with ADC1xD1x00AutoSync Feature for Multi-Chip SynchronizationInternally Terminated, Buffered, Differential Analog InputsInterleaved Timing Automatic and Manual Skew AdjustTest Patterns at Output for System DebugTime Stamp Feature to Capture External TriggerProgrammable Gain, Offset, and tADAdjust Feature1:1 Non-Demuxed or 1:2 Demuxed LVDS OutputsKey SpecificationsResolution 12 BitsInterleaved 1.6/1.0 GSPS ADCIMD3(Fin = 2.7GHz @ -13dBFS): -63/-61 dBc (typ)IMD3(Fin = 2.7GHz @ -16dBFS): -71/-69 dBc (typ)Noise Floor: -152.2/-150.5 dBm/Hz (typ)Noise Power Ratio: 50.4/50.7 dB (typ)Power: 2.50/2.02 W (typ)Dual 800/500 MSPS ADC, Fin = 498 MHzENOB: 9.5/9.6 Bits (typ)SNR: 59.7/59.7 dB (typ)SFDR: 71.2/72 dBc (typ)Power per Channel: 1.25/1.01 W (typ)All trademarks are the property of their respective owners.
Description
AI
The 12-bit 1.6/1.0 GSPS ADC12D800/500RF is an RF-sampling GSPS ADC that can directly sample input frequencies up to and above 2.7 GHz. The ADC12D800/500RF augments the very large Nyquist zone of TI’s GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable range beyond the 7thNyquist zone
The ADC12D800/500RF provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage. The product is packaged in a lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of -40°C to +85°C.
The 12-bit 1.6/1.0 GSPS ADC12D800/500RF is an RF-sampling GSPS ADC that can directly sample input frequencies up to and above 2.7 GHz. The ADC12D800/500RF augments the very large Nyquist zone of TI’s GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable range beyond the 7thNyquist zone
The ADC12D800/500RF provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage. The product is packaged in a lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of -40°C to +85°C.