74HCT595 Series
Automotive 8-bit shift register with TLL-compatible CMOS inputs and 3-state output registers
Manufacturer: Texas Instruments
Catalog(1 parts)
| Part | Number of Bits per Element▲▼ | Grade | Number of Elements▲▼ | Package / Case▲▼ | Package / Case | Package / Case▲▼ | Logic Type | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Mounting Type | Output Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Qualification | Supplier Device Package | Function |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
8 ul | Automotive | 1 ul | 0.004394200164824724 m | 16-TSSOP | 0.004399999976158142 m | Shift Register | 5.5 V | 4.5 V | Surface Mount | Tri-State | -40 °C | 125 °C | AEC-Q100 | 16-TSSOP | Serial to Parallel |
Key Features
• AEC-Q100 qualified for automotive applications:Device temperature grade 1:–40°C to +125°C, TADevice HBM ESD Classification Level 2Device CDM ESD Classifcation Level C6LSTTL input logic compatibleVIL(max)= 0.8 V, VIH(min)= 2 VCMOS input logic compatibleII≤ 1 µA at VOL, VOH4.5 V to 5.5 V operationSupports fanout up to 10 LSTTL loadsShift register has direct clearAEC-Q100 qualified for automotive applications:Device temperature grade 1:–40°C to +125°C, TADevice HBM ESD Classification Level 2Device CDM ESD Classifcation Level C6LSTTL input logic compatibleVIL(max)= 0.8 V, VIH(min)= 2 VCMOS input logic compatibleII≤ 1 µA at VOL, VOH4.5 V to 5.5 V operationSupports fanout up to 10 LSTTL loadsShift register has direct clear
Description
AI
The SN74HCT595-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of theOEinput.
The SN74HCT595-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of theOEinput.