Catalog
Six Pair, N/P Channel Enhancement-Mode MOSFET
Key Features
• * High voltage, vertical DMOS technology
• * Integrated gate-to-source resistor
• * Integrated gate-to-source Zener diode
• * Typical peak output +/-3.5A at 50V
• * Low threshold, low on-resistance
• * Low input & output capacitance
• * Fast switching speeds
• * Electrically isolated N- and P-MOSFET pairs
Description
AI
TC8020 consists of six pairs of high voltage, low threshold N- and P-channel MOSFETs in a 56-lead QFN package. All MOSFETs have integrated gate-to-source resistors and gate-to-source Zener diode clamps which are desired for high voltage pulser applications. The complementary, high-speed, high voltage, gate-clamped N- and P-channel MOSFET pairs utilize an advanced vertical DMOS structure and a well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input and output capacitance, and fast switching speeds are desired.