Catalog(1 parts)
| Part | Package / Case | Package / Case▲▼ | Package / Case▲▼ | Ratio - S/H:ADC | Number of Bits▲▼ | Architecture | Sampling Rate (Per Second)▲▼ | Number of A/D Converters▲▼ | Voltage - Supply, Analog▲▼ | Voltage - Supply, Analog▲▼ | Supplier Device Package | Reference Type | Voltage - Supply, Digital▲▼ | Voltage - Supply, Digital▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Data Interface | Input Type | Mounting Type | Configuration | Number of Inputs▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
28-TSSOP | 0.004399999976158142 m | 0.004394200164824724 m | 1:1 | 10 ul | Pipelined | 65 m | 1 ul | 2.700000047683716 V | 3.5999999046325684 V | 28-TSSOP | External, Internal | 3.5999999046325684 V | 2.5 V | -40 °C | 85 °C | Parallel | Differential, Single Ended | Surface Mount | S/H-ADC | 1 ul |
Key Features
• Single +3.0V OperationSelectable 2 VP-P, 1.5 VP-P, or 1 VP-PFull-scale Input400 MHz −3 dB Input BandwidthLow Power ConsumptionStandby ModeOn-Chip Reference and Sample-and-Hold AmplifierOffset Binary or Two’s Complement Data FormatSeparate Adjustable Output Driver Supply to Accommodate 2.5V and 3.3V Logic Families28-pin TSSOP PackageKey SpecificationsResolution 10 BitsConversion Rate 65 MSPSFull Power Bandwidth 400 MHzDNL ±0.3 LSB (typ)SNR (fIN= 11 MHz) 59.6 dB (typ)SFDR (fIN= 11 MHz) −80 dB (typ)Power Consumption, 65 MHz 68.4 mWAll trademarks are the property of their respective owners.Single +3.0V OperationSelectable 2 VP-P, 1.5 VP-P, or 1 VP-PFull-scale Input400 MHz −3 dB Input BandwidthLow Power ConsumptionStandby ModeOn-Chip Reference and Sample-and-Hold AmplifierOffset Binary or Two’s Complement Data FormatSeparate Adjustable Output Driver Supply to Accommodate 2.5V and 3.3V Logic Families28-pin TSSOP PackageKey SpecificationsResolution 10 BitsConversion Rate 65 MSPSFull Power Bandwidth 400 MHzDNL ±0.3 LSB (typ)SNR (fIN= 11 MHz) 59.6 dB (typ)SFDR (fIN= 11 MHz) −80 dB (typ)Power Consumption, 65 MHz 68.4 mWAll trademarks are the property of their respective owners.
Description
AI
The ADC10065 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 10-bit digital words at 65 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to provide a complete conversion solution, and to minimize power consumption, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 400 MHz. Operating on a single 3.0V power supply, this device consumes just 68.4 mW at 65 MSPS, including the reference current. The Standby feature reduces power consumption to just 14.1 mW.
The differential inputs provide a full scale selectable input swing of 2.0 VP-P, 1.5 VP-P, 1.0 VP-P, with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. An internal +1.2V precision bandgap reference is used to set the ADC full-scale range, and also allows the user to supply a buffered referenced voltage for those applications requiring increased accuracy. The output data format is user choice of offset binary or two’s complement.
This device is available in the 28-lead TSSOP package and will operate over the industrial temperature range of −40°C to +85°C.
The ADC10065 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 10-bit digital words at 65 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to provide a complete conversion solution, and to minimize power consumption, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 400 MHz. Operating on a single 3.0V power supply, this device consumes just 68.4 mW at 65 MSPS, including the reference current. The Standby feature reduces power consumption to just 14.1 mW.
The differential inputs provide a full scale selectable input swing of 2.0 VP-P, 1.5 VP-P, 1.0 VP-P, with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. An internal +1.2V precision bandgap reference is used to set the ADC full-scale range, and also allows the user to supply a buffered referenced voltage for those applications requiring increased accuracy. The output data format is user choice of offset binary or two’s complement.
This device is available in the 28-lead TSSOP package and will operate over the industrial temperature range of −40°C to +85°C.