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Key Features
• Member of the Texas Instruments Widebus™ FamilyDOC™ (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed DegradationDynamic Drive Capability Is Equivalent to Standard Outputs With IOHand IOLof ±24 mA at 2.5-V VCCOvervoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data CommunicationsIoffSupports Partial-Power-Down Mode OperationESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIDOC and Widebus are trademarks of Texas Instruments.Member of the Texas Instruments Widebus™ FamilyDOC™ (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed DegradationDynamic Drive Capability Is Equivalent to Standard Outputs With IOHand IOLof ±24 mA at 2.5-V VCCOvervoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data CommunicationsIoffSupports Partial-Power-Down Mode OperationESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIDOC and Widebus are trademarks of Texas Instruments.
Description
AI
A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOLvs IOLand VOHvs IOHcurves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports,AVC Logic Family Technology and Applications, literature number SCEA006, andDynamic Output Control (DOC™) Circuitry Technology and Applications, literature number SCEA009.
This 16-bit universal bus driver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCCoperation.
Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE)\ input is low. When LE\ is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE\ is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOLvs IOLand VOHvs IOHcurves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports,AVC Logic Family Technology and Applications, literature number SCEA006, andDynamic Output Control (DOC™) Circuitry Technology and Applications, literature number SCEA009.
This 16-bit universal bus driver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCCoperation.
Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE)\ input is low. When LE\ is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE\ is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.