74HCT137 Series
High Speed CMOS Logic 3-to-8 Line Decoder/Demultiplexer with Address Latches
Manufacturer: Texas Instruments
Catalog(1 parts)
| Part | Package / Case▲▼ | Package / Case | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Current - Output High, Low▲▼ | Type | Independent Circuits▲▼ | Voltage Supply Source | Supplier Device Package | Mounting Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Circuit |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0.007619999814778566 m, 0.007619999814778566 m | 16-DIP | 5.5 V | 4.5 V | 0.004000000189989805 A, 0.004000000189989805 A | Decoder/Demultiplexer | 1 ul | Single Supply | 16-PDIP | Through Hole | -55 °C | 125 °C | 1 x 3:8 |
Key Features
• Select One of Eight Data OutputsActive Low for CD74HC137 and CD74HCT137Active High for ’HC237 and CD74HCT237I/O Port or Memory SelectorTwo Enable Inputs to Simplify CascadingTypical Propagation Delay of 13ns at VCC= 5V, 15pF, TA= 25°C (CD74HC237)Fanout (Over Temperature Range)Standard Outputs. . . . 10 LSTTL LoadsBus Driver Outputs. . . . 15 LSTTL LoadsWide Operating Temperature Range . . . –55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30%, of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il1µA at VOL, VOHData sheet acquired from Harris SemiconductorSelect One of Eight Data OutputsActive Low for CD74HC137 and CD74HCT137Active High for ’HC237 and CD74HCT237I/O Port or Memory SelectorTwo Enable Inputs to Simplify CascadingTypical Propagation Delay of 13ns at VCC= 5V, 15pF, TA= 25°C (CD74HC237)Fanout (Over Temperature Range)Standard Outputs. . . . 10 LSTTL LoadsBus Driver Outputs. . . . 15 LSTTL LoadsWide Operating Temperature Range . . . –55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30%, of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il1µA at VOL, VOHData sheet acquired from Harris Semiconductor
Description
AI
The CD74HC137, CD74HCT137, ’HC237, and CD74HCT237 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic.
Both circuits have three binary select inputs (A0, A1 and A2) that can be latched by an active High Latch Enable (LE) signal to isolate the outputs from select-input changes. A "Low" LE makes the output transparent to the input and the circuit functions as a one-of-eight decoder. Two Output Enable inputs (OE\1and OE0) are provided to simplify cascading and to facilitate demultiplexing. The demultiplexing function is accomplished by using the A0, A1, A2inputs to select the desired output and using one of the other Output Enable inputs as the data input while holding the other Output Enable input in its active state. In the CD74HC137 and CD74HCT137 the selected output is a "Low"; in the ’HC237 and CD74HCT237 the selected output is a "High".
The CD74HC137, CD74HCT137, ’HC237, and CD74HCT237 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic.
Both circuits have three binary select inputs (A0, A1 and A2) that can be latched by an active High Latch Enable (LE) signal to isolate the outputs from select-input changes. A "Low" LE makes the output transparent to the input and the circuit functions as a one-of-eight decoder. Two Output Enable inputs (OE\1and OE0) are provided to simplify cascading and to facilitate demultiplexing. The demultiplexing function is accomplished by using the A0, A1, A2inputs to select the desired output and using one of the other Output Enable inputs as the data input while holding the other Output Enable input in its active state. In the CD74HC137 and CD74HCT137 the selected output is a "Low"; in the ’HC237 and CD74HCT237 the selected output is a "High".