CDCE6214Q1TM Series
Ultra-low power clock generator supporting PCIe® gen 1-5 with active low output enable
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Ultra-low power clock generator supporting PCIe® gen 1-5 with active low output enable
| Part | Number of Circuits | Voltage - Supply [Max] | Voltage - Supply [Min] | Qualification | Divider/Multiplier | Operating Temperature [Max] | Operating Temperature [Min] | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Package / Case | Mounting Type | Grade | Type | Input | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] | Output | PLL | Frequency - Max [Max] | Supplier Device Package |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CDCE6214LTWRGERQ1 | 1 | 3.465 V | 1.71 V | AEC-Q100 | Yes/No | 105 °C | -40 °C | 24-VFQFN Exposed Pad | Surface Mount, Wettable Flank | Automotive | Clock Generator | LVCMOS | 2 | 5 | HCSL, LVCMOS, LVDS | 328.125 MHz | 24-VQFN (4x4) |
Key Features
• AEC-Q100 qualified for automotive applicationsTemperature grade 2: –40°C to +105°CFunctional Safety-CapableDocumentation available to aid functional safety system designConfigurable high performance, low-power, frac-N PLL with RMS jitter with spurs (12 kHz – 20 MHz, F out > 100 MHz) as:Integer mode:Differential output: 350 fs typical, 600 fs maximumLVCMOS output: 1.05 ps typical, 1.5 ps maximumFractional mode:Differential output: 1.7 ps typical, 2.1 ps maximumLVCMOS output: 2.0 ps typical, 4.0 ps maximumSupports PCIe Gen1/2/3/4 with SSC and Gen 1/2/3/4/5 without SSCInternal VCO: 2.335 GHz to 2.625 GHzTypical power consumption: 65 mA for 4-output channel, 23 mA for 1-output channel.Universal clock input, two reference inputs for redundancyDifferential AC-coupled or LVCMOS: 10 MHz to 200 MHzCrystal: 10 MHz to 50 MHzFlexible output clock distributionFour channel dividers: Up to five unique output frequencies from 24 kHz to 328.125 MHzCombination of LVDS-like, LP-HCSL or LVCMOS outputs on OUT0 – OUT4 pinsGlitchless output divider switching and output channel synchronizationIndividual output enable through active-low GPIO and registerFrequency margining optionsDCO mode: frequency increment/decrement with 10ppb or less step-sizeFully-integrated, configurable loop bandwidth: 100 kHz to 1.6 MHzSingle or mixed supply for level translation: 1.8 V, 2.5 V, 3.3 VConfigurable GPIOs and flexible configuration optionsI 2C-compatible interface: up to 400 kHzIntegrated EEPROM with two pages and external select pin. In-situ programming allowed.Supports 100-Ω systemsLow electromagnetic emissionsSmall footprint: 24-pin VQFN (4 mm × 4 mm)AEC-Q100 qualified for automotive applicationsTemperature grade 2: –40°C to +105°CFunctional Safety-CapableDocumentation available to aid functional safety system designConfigurable high performance, low-power, frac-N PLL with RMS jitter with spurs (12 kHz – 20 MHz, F out > 100 MHz) as:Integer mode:Differential output: 350 fs typical, 600 fs maximumLVCMOS output: 1.05 ps typical, 1.5 ps maximumFractional mode:Differential output: 1.7 ps typical, 2.1 ps maximumLVCMOS output: 2.0 ps typical, 4.0 ps maximumSupports PCIe Gen1/2/3/4 with SSC and Gen 1/2/3/4/5 without SSCInternal VCO: 2.335 GHz to 2.625 GHzTypical power consumption: 65 mA for 4-output channel, 23 mA for 1-output channel.Universal clock input, two reference inputs for redundancyDifferential AC-coupled or LVCMOS: 10 MHz to 200 MHzCrystal: 10 MHz to 50 MHzFlexible output clock distributionFour channel dividers: Up to five unique output frequencies from 24 kHz to 328.125 MHzCombination of LVDS-like, LP-HCSL or LVCMOS outputs on OUT0 – OUT4 pinsGlitchless output divider switching and output channel synchronizationIndividual output enable through active-low GPIO and registerFrequency margining optionsDCO mode: frequency increment/decrement with 10ppb or less step-sizeFully-integrated, configurable loop bandwidth: 100 kHz to 1.6 MHzSingle or mixed supply for level translation: 1.8 V, 2.5 V, 3.3 VConfigurable GPIOs and flexible configuration optionsI 2C-compatible interface: up to 400 kHzIntegrated EEPROM with two pages and external select pin. In-situ programming allowed.Supports 100-Ω systemsLow electromagnetic emissionsSmall footprint: 24-pin VQFN (4 mm × 4 mm)
Description
AI
The CDCE6214Q1TM is a 4-channel, ultra-low power, medium grade jitter, clock generator for automotive application that can generate five independent clock outputs selectable between various modes of drivers. The input source can be a single-ended or differential input clock source, or a crystal. The CDCE6214Q1TM features a frac-N PLL to synthesize unrelated base frequency from any input frequency.
The CDCE6214Q1TM is a 4-channel, ultra-low power, medium grade jitter, clock generator for automotive application that can generate five independent clock outputs selectable between various modes of drivers. The input source can be a single-ended or differential input clock source, or a crystal. The CDCE6214Q1TM features a frac-N PLL to synthesize unrelated base frequency from any input frequency.