
270PGILF
ActiveTRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK
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270PGILF
ActiveTRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK
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Technical Specifications
Parameters and characteristics for this part
Specification | 270PGILF |
---|---|
Differential - Input:Output | False |
Frequency - Max [Max] | 200 MHz |
Input | Crystal |
Mounting Type | Surface Mount |
Number of Circuits | 1 |
Operating Temperature [Max] | 85 °C |
Operating Temperature [Min] | -40 °C |
Output | CMOS |
Package / Case | 20-TSSOP |
Package / Case [x] | 0.173 in |
Package / Case [y] | 4.4 mm |
PLL | Yes with Bypass |
Ratio - Input:Output | 1:8 |
Supplier Device Package | 20-TSSOP |
Type | Clock/Frequency Synthesizer, Fanout Buffer (Distribution) |
Voltage - Supply [Max] | 3.465 V |
Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Distributor | Package | Quantity | $ | |
---|---|---|---|---|
270 Series
Triple PLL Field Programmable VCXO Clock
Part | Voltage - Supply [Max] | Voltage - Supply [Min] | PLL | Operating Temperature [Max] | Operating Temperature [Min] | Input | Package / Case [y] | Package / Case | Package / Case [x] | Mounting Type | Number of Circuits | Ratio - Input:Output | Frequency - Max [Max] | Type | Output | Supplier Device Package | Differential - Input:Output |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Renesas Electronics Corporation 270PGILF | 3.465 V | 3.135 V | Yes with Bypass | 85 °C | -40 °C | Crystal | 4.4 mm | 20-TSSOP | 0.173 in | Surface Mount | 1 | 1:8 | 200 MHz | Clock/Frequency Synthesizer, Fanout Buffer (Distribution) | CMOS | 20-TSSOP |
Description
General part information
270 Series
The 270 field programmable VCXO clock synthesizer generates up to eight high-quality, high-frequency clock outputs including multiple reference clocks from a low-frequency crystal input. It is designed to replace crystals and crystal oscillators in most electronic systems. Using IDT's VersaClockTM software to configure PLLs and outputs, the 270 contains a One-Time Programmable (OTP) ROM for field programmability. Programming features include VCXO, eight selectable configuration registers and up to two sets of four low-skew outputs. Using Phase-Locked Loop (PLL) techniques, the device runs from a standard fundamental mode, inexpensive crystal, or clock. It can replace VCXOs, multiple crystals and oscillators, saving board space and cost. The 270 is also available in factory programmed custom versions for high-volume applications.
Documents
Technical documentation and resources