M95160-DFDW6TP
ActiveEEPROM SERIAL-SPI 16K-BIT 2K X 8 1.8V/2.5V/3.3V/5V 8-PIN TSSOP T/R
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M95160-DFDW6TP
ActiveEEPROM SERIAL-SPI 16K-BIT 2K X 8 1.8V/2.5V/3.3V/5V 8-PIN TSSOP T/R
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Technical Specifications
Parameters and characteristics for this part
| Specification | M95160-DFDW6TP |
|---|---|
| Clock Frequency | 20 MHz |
| Memory Format | EEPROM |
| Memory Interface | SPI |
| Memory Organization | 2K x 8 |
| Memory Size | 16 Kbit |
| Memory Type | Non-Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 8-TSSOP |
| Package / Case [custom] | 0.173 " |
| Package / Case [custom] | 4.4 mm |
| Supplier Device Package | 8-TSSOP |
| Technology | EEPROM |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.7 V |
| Write Cycle Time - Word, Page | 5 ms |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.43 | |
| 10 | $ 0.42 | |||
| 25 | $ 0.39 | |||
| 50 | $ 0.39 | |||
| 100 | $ 0.35 | |||
| 250 | $ 0.34 | |||
| 500 | $ 0.34 | |||
| 1000 | $ 0.33 | |||
| Digi-Reel® | 1 | $ 0.43 | ||
| 10 | $ 0.42 | |||
| 25 | $ 0.39 | |||
| 50 | $ 0.39 | |||
| 100 | $ 0.35 | |||
| 250 | $ 0.34 | |||
| 500 | $ 0.34 | |||
| 1000 | $ 0.33 | |||
| Tape & Reel (TR) | 4000 | $ 0.30 | ||
| 8000 | $ 0.29 | |||
| 12000 | $ 0.29 | |||
| 28000 | $ 0.28 | |||
Description
General part information
M95160-A125 Series
The M95160-A125 and M95160-A145 are 16-Kbit serial EEPROM automotive grade devices operating up to 145 °C. They are compliant with the very high level of reliability defined by the automotive standard AEC-Q100 grade 0.
The devices are accessed by a simple serial SPI compatible interface running up to 20 MHz.
The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95160-A125 and M95160-A145 are byte-alterable memories (2048 × 8 bits) organized as 64 pages of 32 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic.