STL300N4LF8
ActiveN-CHANNEL LOGIC LEVEL 40 V, 1.0 MOHM MAX., 304 A, STRIPFET F8 POWER MOSFET IN A POWERFLAT 5X6 PACKAGE
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STL300N4LF8
ActiveN-CHANNEL LOGIC LEVEL 40 V, 1.0 MOHM MAX., 304 A, STRIPFET F8 POWER MOSFET IN A POWERFLAT 5X6 PACKAGE
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Technical Specifications
Parameters and characteristics for this part
| Specification | STL300N4LF8 |
|---|---|
| Current - Continuous Drain (Id) @ 25°C | 120 A |
| Drain to Source Voltage (Vdss) | 40 V |
| Drive Voltage (Max Rds On, Min Rds On) | 10 V, 4.5 V |
| FET Type | N-Channel |
| Gate Charge (Qg) (Max) @ Vgs [Max] | 70 nC |
| Input Capacitance (Ciss) (Max) @ Vds [Max] | 5400 pF |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 175 ░C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 8-PowerVDFN |
| Power Dissipation (Max) | 167 W |
| Rds On (Max) @ Id, Vgs | 1 mOhm |
| Supplier Device Package | PowerFlat™ (5x6) |
| Technology | MOSFET (Metal Oxide) |
| Vgs (Max) | 20 V |
| Vgs(th) (Max) @ Id | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 3.55 | |
| 10 | $ 2.33 | |||
| 25 | $ 2.01 | |||
| 100 | $ 1.65 | |||
| 250 | $ 1.47 | |||
| 500 | $ 1.37 | |||
| 1000 | $ 1.28 | |||
| Digi-Reel® | 1 | $ 3.55 | ||
| 10 | $ 2.33 | |||
| 25 | $ 2.01 | |||
| 100 | $ 1.65 | |||
| 250 | $ 1.47 | |||
| 500 | $ 1.37 | |||
| 1000 | $ 1.28 | |||
| Tape & Reel (TR) | 3000 | $ 1.17 | ||
| 6000 | $ 1.11 | |||
| 9000 | $ 1.09 | |||
| Newark | Each (Supplied on Cut Tape) | 1 | $ 2.73 | |
| 10 | $ 2.14 | |||
| 25 | $ 2.04 | |||
| 50 | $ 1.95 | |||
| 100 | $ 1.90 | |||
| 250 | $ 1.82 | |||
| 500 | $ 1.78 | |||
| 1000 | $ 1.72 | |||
Description
General part information
STL300N4LF8 Series
The STL300N4LF8 is a 40 V N-channel enhancement mode Power MOSFET designed in STripFET F8 technology featuring an enhanced trench gate structure.
It ensures a state-of-the-art of figure of merit for very low on-state resistance while reducing internal capacitances and gate charge for faster and more efficient switching.
Documents
Technical documentation and resources