74LVC1G97W6-7
ActiveCONFIGURABLE MULTIPLE FUNCTION GATE, SINGLE, 3 INPUT, 6 PINS, SOT-26, 74LVC1G97
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74LVC1G97W6-7
ActiveCONFIGURABLE MULTIPLE FUNCTION GATE, SINGLE, 3 INPUT, 6 PINS, SOT-26, 74LVC1G97
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Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC1G97W6-7 |
|---|---|
| Current - Output High, Low [x] | 32 mA |
| Current - Output High, Low [y] | 32 mA |
| Logic Type | Configurable Multiple Function |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Number of Inputs | 3 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Single-Ended |
| Package / Case | SOT-23-6 |
| Schmitt Trigger Input | False |
| Supplier Device Package | SOT-26 |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.37 | |
| 10 | $ 0.30 | |||
| 25 | $ 0.25 | |||
| 100 | $ 0.16 | |||
| 250 | $ 0.12 | |||
| 500 | $ 0.10 | |||
| 1000 | $ 0.07 | |||
| Digi-Reel® | 1 | $ 0.37 | ||
| 10 | $ 0.30 | |||
| 25 | $ 0.25 | |||
| 100 | $ 0.16 | |||
| 250 | $ 0.12 | |||
| 500 | $ 0.10 | |||
| 1000 | $ 0.07 | |||
| Tape & Reel (TR) | 3000 | $ 0.06 | ||
| 6000 | $ 0.06 | |||
| 15000 | $ 0.05 | |||
| 30000 | $ 0.04 | |||
| 75000 | $ 0.04 | |||
| 150000 | $ 0.04 | |||
Description
General part information
74LVC1G97 Series
The 74LVC1G97 is a single three-input positive configurable multiple-function gate with a standard push-pull output. The output state is determined by eight patterns of three-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter or noninverting buffer. All inputs can be connected to ground or VCCas required. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output to prevent damaging current backflow when the device is powered down. The user is reminded that the device can simulate several types of logic gates but may respond differently due to the Schmitt action at the inputs.
Documents
Technical documentation and resources