The 8523 is a low skew, high performance 1-to-4 Differential-to-HSTL Fanout Buffer. The 8523 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8523 ideal for those applications demanding well defined performance and repeatability.