Technical Specifications
Parameters and characteristics for this part
| Specification | STM32L071CBU6TR |
|---|---|
| Connectivity | IrDA, SMBus, UART/USART, I2C, SPI |
| Core Processor | ARM® Cortex®-M0+ |
| Core Size | 32-Bit |
| Data Converters | A/D 10x12b SAR |
| EEPROM Size | 6 K |
| Mounting Type | Surface Mount |
| Number of I/O | 37 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Oscillator Type | External, Internal |
| Package / Case | 48-UFQFN Exposed Pad |
| Peripherals | I2S, POR, Brown-out Detect/Reset, DMA, WDT, Temp Sensor, PWM, Voltage Detect |
| Program Memory Size | 128 KB |
| Program Memory Type | FLASH |
| RAM Size | 20 K |
| Speed | 32 MHz |
| Supplier Device Package | 48-UFQFPN (7x7) |
| Voltage - Supply (Vcc/Vdd) [Max] | 3.6 V |
| Voltage - Supply (Vcc/Vdd) [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 2500 | $ 2.02 | |
Description
General part information
STM32L071C8 Series
The access line ultra-low-power STM32L071xx microcontrollers incorporate the high-performance Arm Cortex-M0+ 32-bit RISC core operating at a 32 MHz frequency, a memory protection unit (MPU), high-speed embedded memories (up to 192 Kbytes of Flash program memory, 6 Kbytes of data EEPROM and 20 Kbytes of RAM) plus an extensive range of enhanced I/Os and peripherals.
The STM32L071xx devices provide high power efficiency for a wide range of performance. It is achieved with a large choice of internal and external clock sources, an internal voltage adaptation and several low-power modes.
The STM32L071xx devices offer several analog features, one 12-bit ADC with hardware oversampling, two ultra-low-power comparators, several timers, one low-power timer (LPTIM), four general-purpose 16-bit timers and two basic timer, one RTC and one SysTick which can be used as timebases. They also feature two watchdogs, one watchdog with independent clock and window capability and one window watchdog based on bus clock.
Documents
Technical documentation and resources