
SY88933VKG-TR
Active3.3V-5.0V 1.25GBPS PECL POST AMP 10 MSOP 3X3X1.0MM T/R ROHS COMPLIANT: YES
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SY88933VKG-TR
Active3.3V-5.0V 1.25GBPS PECL POST AMP 10 MSOP 3X3X1.0MM T/R ROHS COMPLIANT: YES
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Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Distributor | Package | Quantity | $ | |
---|---|---|---|---|
Digikey | Cut Tape (CT) | 1 | $ 9.65 | |
Tape & Reel (TR) | 1000 | $ 7.30 | ||
Microchip Direct | T/R | 1 | $ 9.65 | |
25 | $ 8.03 | |||
100 | $ 7.30 | |||
1000 | $ 6.08 | |||
5000 | $ 5.63 | |||
10000 | $ 5.21 | |||
Newark | Each (Supplied on Full Reel) | 100 | $ 7.52 |
Description
General part information
SY88933V Series
The SY88933V low-power limiting post amplifier is designed for use in fiber-optic receivers. The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88933V quantizes these signals and outputs PECL level waveforms.
The SY88933V operates from a single +3.3V or +5V power supply, over temperatures ranging from -40°C to +85°C. With its wide bandwidth and high gain, signals with data rates up to 1.25Gbps and as small as 5mVp-p can be amplified to drive devices with PECL inputs.
The SY88933V generates a TTL SD output. A programmable signal-detect level set pin (SDLVL) sets the sensitivity of the input amplitude detection. SD asserts high if the input amplitude rises above the threshold set by SDLVL and deasserts low otherwise. EN deasserts the true output signal without removing the input signal. Typically 4.6dB SD hysteresis is provided to prevent chattering.
Documents
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