ADSP-BF561SBBCZ-5A

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Analog Devices Inc

BLACKFIN SYMMETRIC MULTI-PROCESSOR FOR CONSUMER MULTIMEDIA

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Search across all available documentation for this part.

DocumentsEE-335: Interfacing SD Cards with Blackfin Processors (Rev.1)VisualDSP++®5.0 Quick Installation Reference Card (Rev.3.1)+53

ADSP-BF561SBBCZ-5A

Active

Analog Devices Inc

BLACKFIN SYMMETRIC MULTI-PROCESSOR FOR CONSUMER MULTIMEDIA

Deep-Dive with AI

DocumentsEE-335: Interfacing SD Cards with Blackfin Processors (Rev.1)VisualDSP++®5.0 Quick Installation Reference Card (Rev.3.1)+53

Specifications Pricing Series Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	ADSP-BF561SBBCZ-5A

Clock Rate	533 MHz
Interface	UART, SPI, SSP
Mounting Type	Surface Mount
Non-Volatile Memory	External
On-Chip RAM	328 kB
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Package / Case	CSPBGA, 256-BGA
Supplier Device Package	256-CSPBGA (17x17)
Type	Fixed Point
Voltage - Core	1.25 V
Voltage - I/O	3.3 V, 2.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

ADSP-BF561 Series

Blackfin Symmetric Multi-Processor for Consumer Multimedia

Part	Interface	Clock Rate	Voltage - Core	On-Chip RAM	Voltage - I/O	Operating Temperature [Max]	Operating Temperature [Min]	Type	Package / Case	Non-Volatile Memory	Supplier Device Package	Mounting Type
Analog Devices Inc ADSP-BF561SBBCZ-5A	SPI, SSP, UART	533 MHz	1.25 V	328 kB	2.5 V, 3.3 V	85 °C	-40 °C	Fixed Point	256-BGA, CSPBGA	External	256-CSPBGA (17x17)	Surface Mount

Description

General part information

ADSP-BF561 Series

The Blackfin®Processor family expands the performance envelope with the ADSP-BF561. With two high performance Blackfin Processor cores, flexible cache architecture, enhanced DMA subsystem, and Dynamic Power Management (DPM) functionality, the ADSP-BF561 can support complex control and signal processing tasks while maintaining extremely high data throughput.The ADSP-BF561 is a functional extension of the popular Blackfin Processor family and is ideally suited for a broad range of industrial, instrumentation, medical, and consumer appliance applications—allowing for scalability based upon the required data bandwidth and mix of control, plus signal processing needed in the end product.High-Level of Integration328 KBytes of on-chip memory configured as:32 KBytes of L1 instruction memory SRAM/Cache per core64 KBytes of L1 data memory SRAM/Cache per core4 KBytes of L1 scratchpad memory per core128 KBytes of low-latency shared L2 memory32-bit Memory Controller providing glueless connection to multiple banks of SDRAM, SRAM, Flash or ROM.Two Parallel Peripheral Interfaces Units supporting ITU-R 656 video data formats.Two dual-channel, full-duplex, synchronous serial ports supporting eight stereo I2S channels.Dual 16 Channel DMA Controllers, supporting one and two-dimension transfers.SPI-compatible Port.UART with support for IrDA®.12 timer/counters supporting PWM, pulsewidth and event count modes.48 Programmable Flags/General Purpose I/O.Event Handler.Dual Watchdog timers.PLL capable of 1x to 63x frequency multiplication.256-ball Mini-BGA and 297-ball Sparse PBGA packages.

Documents

Technical documentation and resources

ADSP-BF561SBBCZ-5A

Deep-Dive with AI

ADSP-BF561SBBCZ-5A

Deep-Dive with AI

Technical Specifications

Pricing

ADSP-BF561 Series

Description

ADSP-BF561 Series

Documents

EE-335: Interfacing SD Cards with Blackfin Processors (Rev.1)

VisualDSP++®5.0 Quick Installation Reference Card (Rev.3.1)

EE-293: Estimating Power for ADSP-BF561 Blackfin® Processors (Rev.2)

EE-300: Interfacing Blackfin® EZ-KIT Lite® Boards to CMOS Image Sensors (Rev.1)

Blackfin®FPGA EZ-Extender®Manual (Rev.2.1)

EE-281: Hardware Design Checklist for the Blackfin® Processors (Rev.2)

VisualDSP++®5.0 Licensing Guide (Rev.1.4)

EE-289: Implementing FAT32 File Systems on ADSP-BF533 Blackfin® Processors (Rev.1)

EE-228: Switching Regulator Design Considerations for ADSP-BF533 Blackfin® Processors (Rev.1)

EE-183: Rational Sample Rate Conversion with Blackfin® Processors (Rev.5)

EE-197: ADSP-BF531/532/533 Blackfin® Processor Multi-cycle Instructions and Latencies

ICE-100B Emulator User’s Guide (Rev.1.1)

Blackfin®A-V EZ-Extender®Manual (Rev.2.1)

VisualDSP++®5.0 Assembler and Preprocessor Manual (Rev.3.4)

Blackfin Processor Family Product Highlight

Blackfin®/SHARC®USB EZ-Extender®Manual (Rev.1.1)

EE-256: Using the ADSP-BF561 Blackfin® Processor as a TFT-LCD Controller (Rev.2)

VisualDSP++®5.0 Device Drivers and System Services Manual for Blackfin Processors (Rev.4.3)

VisualDSP++®5.0 Getting Started Guide (Rev.3.0)

ADSP-BF561: Blackfin Embedded Symmetric Multiprocessor Data Sheet (Rev.F)

ADSP-BF561 EZ-KIT Lite®Evaluation System Manual (Rev.3.3)

Video Filtering Considerations for Media Processors

VisualDSP++®5.0 Users Guide (Rev.3.0)

Understanding Advanced Processor Features Promotes Efficient Coding

EE-185: Fast Floating-Point Arithmetic Emulation on Blackfin® Processors (Rev.4)

A BDTI Analysis of the Analog Devices ADSP-BF5xx

EE-339: Using External Switching Regulators with Blackfin® Processors (Rev.1)

VisualDSP++®5.0 Kernel (VDK) Users Guide (Rev.3.5)

EE-269: A Beginner’s Guide to Ethernet 802.3 (Rev.1)

ADSP-BF5xx/ADSP-BF60x Blackfin® Processor Programming Reference (Rev.2.2)

VisualDSP++®5.0 Product Release Bulletin (Rev.3.0)

EZ-KIT Lite for Analog Devices ADSP-BF561 Blackfin Processor

AN-813: Interfacing the ADSP-BF533/ADSP-BF561 Blackfin®; Processors to High Speed Parallel ADCs

Is it Really Possible to Play DVD Quality Media While Executing Linux Applications?

EE-265: Using ADSP-BF561 Blackfin® Processor Flag Pins to Emulate the PCM Interface (Rev.1)

Package Drawing - 256-Ball CSPBGA (17mm x 17mm x 1.76mm)

EE-294: Energy-Aware Programming on Blackfin Processors (Rev.1)

EE-272: Managing Multiple DXEs on ADSP-BF561 Blackfin® Processors (Rev.1)

Blackfin®EZ-Extender®Manual (Rev.4.1)

ADSP-BF561 Blackfin Dual-Core Embedded Processor

Enhance Processor Performance in Open-Source Applications

Designing IPTV Set-top Boxes Without Getting Boxed In

Blackfin Processor's Parallel Peripheral Interface Simplifies LCD Connection in Portable Multimedia

EE-258: Interfacing Micron MT9V022 Image Sensors to Blackfin® Processors (Rev.2)

VisualDSP++®5.0 Linker and Utilities Manual (Rev.3.5)

VisualDSP++®5.0 Loader and Utilities Manual (Rev.2.5)

EE-326: Blackfin® Processor and SDRAM Technology (Rev.2)

HPUSB, USB, and HPPCI Emulator User’s Guide (Rev.3.2)

EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14)

VisualDSP++®5.0 C/C++ Compiler and Library Manual for Blackfin Processors (Rev.5.4)

EE-314: Booting the ADSP-BF561 Blackfin® Processor (Rev.1)

ICE-1000/ICE-2000 Emulator User’s Guide (Rev.1.2)

ADSP-BF561 Blackfin®Processor Hardware Reference (Rev.1.4)

Blackfin Processor Family

Datasheet