
SN74ALS112AN
ActiveDUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

SN74ALS112AN
ActiveDUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
Description
General part information
SN74ALS112A Series
These devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs, regardless of the levels of the other inputs. Whenandare inactive (high), data at the J and K inputs meeting the setup-time requirements is transferred to the outputs on the negative-going edge of the clock pulse (CLK). Clock triggering occurs at a voltage level and is not directly related to the fall time of the clock pulse. Following the hold-time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by tying J and K high.
The SN54ALS112A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS112A is characterized for operation from 0°C to 70°C.
These devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs, regardless of the levels of the other inputs. Whenandare inactive (high), data at the J and K inputs meeting the setup-time requirements is transferred to the outputs on the negative-going edge of the clock pulse (CLK). Clock triggering occurs at a voltage level and is not directly related to the fall time of the clock pulse. Following the hold-time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by tying J and K high.
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ALS112AN |
|---|---|
| Clock Frequency | 30 MHz |
| Current - Output High | 400 µA |
| Current - Output Low | 8 mA |
| Current - Quiescent (Iq) | 4.5 mA |
| Function | Set(Preset) and Reset |
| Max CL | 50 pF |
| Max Propagation Delay | 19 ns |
| Mounting Type | Through Hole |
| Number of Bits per Element | 1 bits |
| Number of Elements | 2 |
| Operating Temperature (Max) | 70 °C |
| Operating Temperature (Min) | 0 °C |
| Output Type | Complementary |
| Package Length | 0.3 in |
| Package Name | 16-PDIP, 16-DIP |
| Package Width | 7.62 mm |
| Trigger Type | Negative Edge |
| Type | JK Type |
| Voltage - Supply (Maximum) | 5.5 V |
| Voltage - Supply (Minimum) | 4.5 V |
Pricing
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