Zenode.ai Logo

Description

General part information

CD4502 Series

CD4502B consists of six inverter/buffers with 3-state outputs. A logic "1" on the OUTPUT DISABLE input produces a high-impedance state in all six outputs. This feature permits common busing of the outputs, thus simplifying system design. A Logic "1" on the INHIBIT input switches all six outputs to logic "0" if the OUTPUT DISABLE input is a logic "0". This device is capable of driving two standard TTL loads, which is equivalent to six times the JEDEC "B"-series IOLstandard.

The CD4502B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4502B consists of six inverter/buffers with 3-state outputs. A logic "1" on the OUTPUT DISABLE input produces a high-impedance state in all six outputs. This feature permits common busing of the outputs, thus simplifying system design. A Logic "1" on the INHIBIT input switches all six outputs to logic "0" if the OUTPUT DISABLE input is a logic "0". This device is capable of driving two standard TTL loads, which is equivalent to six times the JEDEC "B"-series IOLstandard.

Technical Specifications

Parameters and characteristics for this part

SpecificationCD4502BM
Current - Output High3.4 mA
Current - Output Low20.4 mA
Logic TypeInverting, Buffer
Mounting TypeSurface Mount
Number of Bits per Element6 bits
Number of Elements1
Operating Temperature (Max)125 °C
Operating Temperature (Min)-55 °C
Output TypePush-Pull
Package Length0.154 in
Package Name16-SOIC
Package Width3.9 mm
Voltage - Supply (Maximum)18 V
Voltage - Supply (Minimum)3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Sign in to see pricing

Create a free account to access distributor pricing data.

CAD

3D models and CAD resources for this part