
CD74HC374M
ObsoleteTexas Instruments
HIGH SPEED CMOS LOGIC OCTAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

CD74HC374M
ObsoleteTexas Instruments
HIGH SPEED CMOS LOGIC OCTAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
Description
General part information
74HC374 Series
High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs
Technical Specifications
Parameters and characteristics for this part
| Specification | CD74HC374M |
|---|---|
| Clock Frequency | 60 MHz |
| Current - Output High | 7.8 mA |
| Current - Output Low | 7.8 mA |
| Current - Quiescent (Iq) | 8 µA |
| Function | Standard |
| Input Capacitance | 10 pF |
| Max CL | 50 pF |
| Max Propagation Delay | 28 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 bits |
| Number of Elements | 1 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -55 °C |
| Output Type | Tri-State, Non-Inverted |
| Package Length | 0.295 in |
| Package Name | 20-SOIC |
| Package Width | 7.5 mm |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply (Maximum) | 6 V |
| Voltage - Supply (Minimum) | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Sign in to see pricing
Create a free account to access distributor pricing data.
CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
CDx4HC374 High-Speed CMOS Logic Octal D-Type Flip-Flop, 3-State Positive-Edge Triggered datasheet (Rev. E)
Live Insertion
CMOS Power Consumption and CPD Calculation (Rev. B)
SN54/74HCT CMOS Logic Family Applications and Restrictions
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
TI IBIS File Creation, Validation, and Distribution Processes
Implications of Slow or Floating CMOS Inputs (Rev. E)
Designing With Logic (Rev. C)
Logic Guide (Rev. AB)
Signal Switch Data Book (Rev. A)
LOGIC Pocket Data Book (Rev. B)
Power-Up Behavior of Clocked Devices (Rev. B)
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Input and Output Characteristics of Digital Integrated Circuits
Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc