SN74LVC1G00DRLR
ActiveTexas Instruments
NAND GATE 1-ELEMENT 2-IN CMOS 5-PIN SOT-553 T/R
SN74LVC1G00DRLR
ActiveTexas Instruments
NAND GATE 1-ELEMENT 2-IN CMOS 5-PIN SOT-553 T/R
Description
General part information
74LVC1G00 Series
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCCoperation.
The SN74LVC1G00 performs the Boolean functionY =A × Bor Y =A+Bin positive logic.
The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range.
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LVC1G00DRLR |
|---|---|
| Current - Output High | 32 mA |
| Current - Output Low | 32 mA |
| Current - Quiescent (Max) | 10 µA |
| Input Logic Level - High (Max) | 2 V |
| Input Logic Level - High (Min) | 1.7 V |
| Input Logic Level - Low (Max) | 0.8 V |
| Input Logic Level - Low (Min) | 0.7 V |
| Logic Type | NAND Gate |
| Max CL | 50 pF |
| Max Propagation Delay | 4.3 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Number of Inputs | 2 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | SOT-553 |
| Package Name | SOT-5 |
| Voltage - Supply (Maximum) | 5.5 V |
| Voltage - Supply (Minimum) | 1.65 V |
Pricing
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CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
Implications of Slow or Floating CMOS Inputs (Rev. E)
Input and Output Characteristics of Digital Integrated Circuits
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
LVC Characterization Information
Standard Linear & Logic for PCs, Servers & Motherboards
Low-Voltage Logic (LVC) Designer's Guide
SN74LVC1G00 Single 2-Input Positive-NAND Gate datasheet (Rev. AB)
Signal Switch Data Book (Rev. A)
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Texas Instruments Little Logic Application Report
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
How to Select Little Logic (Rev. A)
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
The Davies Sinusoidal Generator
Designing and Manufacturing with TI's X2SON Packages
Live Insertion
Selecting the Right Level Translation Solution (Rev. A)
TI IBIS File Creation, Validation, and Distribution Processes
Design Summary for WCSP Little Logic (Rev. B)
Logic Guide (Rev. AB)
Little Logic Guide 2018 (Rev. G)
Understanding Advanced Bus-Interface Products Design Guide
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
CMOS Power Consumption and CPD Calculation (Rev. B)
LOGIC Pocket Data Book (Rev. B)
