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71124 - Block Diagram

71124S12YG

Obsolete
Renesas Electronics Corporation

5.0V 128K X 8 ASYNCHRONOUS STATIC RAM CENTER PWR & GND PINOUT

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71124 - Block Diagram

71124S12YG

Obsolete
Renesas Electronics Corporation

5.0V 128K X 8 ASYNCHRONOUS STATIC RAM CENTER PWR & GND PINOUT

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Description

General part information

71124 Series

The 71124 5V CMOS SRAM is organized as 128K x 8. The JEDEC centerpower/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71124 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.

Technical Specifications

Parameters and characteristics for this part

Specification71124S12YG
Access Time12 ns
Memory Depth128 K
Memory FormatSRAM
Memory Interface (Type)Parallel
Memory Size1 Mbit
Memory TypeVolatile
Memory Width8 bit
Mounting TypeSurface Mount
Operating Temperature (Max)70 °C
Operating Temperature (Min)0 °C
Package Length10.16 mm
Package Name32-SOJ, 32-BSOJ
Package Width10.16 mm
TechnologySRAM - Asynchronous
Voltage - Supply (Maximum)5.5 V
Voltage - Supply (Minimum)4.5 V
Write Cycle Time - Page12 ns
Write Cycle Time - Word12 ns

Pricing

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CAD

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Documents

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