
71V547S80PFGI
Obsolete3.3V 128K X 36 ZBT SYNCHRONOUS FLOW-THROUGH SRAM

71V547S80PFGI
Obsolete3.3V 128K X 36 ZBT SYNCHRONOUS FLOW-THROUGH SRAM
Description
General part information
71V547 Series
The 71V547 3.3V CMOS SRAM is organized as 128K x 36 bits. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turn-around. The 71V547 contains address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.
Technical Specifications
Parameters and characteristics for this part
| Specification | 71V547S80PFGI |
|---|---|
| Access Time | 8 ns |
| Memory Depth | 128 K |
| Memory Format | SRAM |
| Memory Interface (Type) | Parallel |
| Memory Size | 4.5 Mbit |
| Memory Type | Volatile |
| Memory Width | 36 bit |
| Mounting Type | Surface Mount |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | 100-LQFP |
| Package Length | 14 mm |
| Package Name | 100-TQFP |
| Package Width | 14 mm |
| Technology | SDR (ZBT), SRAM - Synchronous |
| Voltage - Supply (Maximum) | 3.465 V |
| Voltage - Supply (Minimum) | 3.135 V |
Pricing
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