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Description

General part information

672-02 Series

The 672-01/02 are zero delay buffers that generate four output clocks whose phases are spaced at 90° intervals. Based on IDT's proprietary low jitter Phase-Locked Loop (PLL) techniques, each device provides five low-skew outputs, with clock rates up to 84 MHz for the 672-01 and up to 135 MHz for the 672-02. By providing outputs delayed one quarter clock cycle, the device is useful for systems requiring early or late clocks. The 672-01/02 include multiplier selections of x0.5, x1, x2, x3, x4, x5, or x6. They also offer a mode to power-down all internal circuitry and tri-state the outputs. In normal operation, output clock FBCLK is tied to the FBIN pin. IDT manufactures the largest variety of clock generators and buffers, and is the largest clock supplier in the world.

Technical Specifications

Parameters and characteristics for this part

Specification672M-02ILFT
Differential InputNo
Differential OutputNo
DividerYes
Frequency - Max135 MHz
InputClock
Input Ratio1
Mounting TypeSurface Mount
MultiplierYes
Number of Circuits1
Operating Temperature (Max)85 °C
Operating Temperature (Min)-40 °C
OutputCMOS
Output Ratio4
Package Length0.154 in
Package Name16-SOIC
Package Width3.9 mm
PLLYes
TypeZero Delay Buffer, Fanout Buffer (Distribution)
Voltage - Supply (Maximum)5.5 V
Voltage - Supply (Minimum)3.13 V

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