The PI6ULS5V9511B is a hot-swappable I2 C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from connecting to the card until a stop command or bus idle occurs on the backplane without bus contention on the card.When the connection is made, the PI6ULS5V9511B provides bidirectional buffering, which keeps the backplane and card capacitances isolated. The PI6ULS5V9511B rise-time accelerator circuitry allows the use of weaker DC pullup currents while still meetingrise-time requirements. The PI6ULS5V9511B incorporates a digital ENABLE input pin, which enables the device when asserted HIGH and forces the device into a low-currentmode when asserted LOW. The PI6ULS5V9511B also incorporates an open-drain READY output pin, which indicates that the backplane and card sides are connectedtogether (HIGH) or not (LOW). During insertion, the PI6ULS5V9511B SDA and SCL linesare pre-charged to 1.1V to minimize the current required to charge the parasitic capacitance of the chip.