
PI6CBF18501ZLAIEX
ActiveVERY LOW POWER 5-OUTPUT PCIE FANOUT BUFFER WITH ON-CHIP TERMINATION
Deep-Dive with AI
Search across all available documentation for this part.

PI6CBF18501ZLAIEX
ActiveVERY LOW POWER 5-OUTPUT PCIE FANOUT BUFFER WITH ON-CHIP TERMINATION
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | PI6CBF18501ZLAIEX |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 200 MHz |
| Input | HCSL, CMOS |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | HCSL |
| Package / Case | 40-WFQFN Exposed Pad |
| Ratio - Input:Output | 1:5 |
| Supplier Device Package | 40-TQFN (5x5) |
| Type | Fanout Buffer (Distribution) |
| Voltage - Supply [Max] | 1.9 V |
| Voltage - Supply [Min] | 1.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 2.92 | |
| 10 | $ 2.62 | |||
| 25 | $ 2.47 | |||
| 100 | $ 2.11 | |||
| 250 | $ 1.98 | |||
| 500 | $ 1.73 | |||
| 1000 | $ 1.44 | |||
| Digi-Reel® | 1 | $ 3.88 | ||
| 10 | $ 2.55 | |||
| 25 | $ 2.20 | |||
| 100 | $ 1.82 | |||
| 250 | $ 1.63 | |||
| 500 | $ 1.51 | |||
| 1000 | $ 1.42 | |||
| Tape & Reel (TR) | 3500 | $ 1.28 | ||
| 7000 | $ 1.23 | |||
| Newark | Each (Supplied on Cut Tape) | 1 | $ 3.98 | |
| 10 | $ 2.18 | |||
| 25 | $ 2.05 | |||
| 50 | $ 1.90 | |||
| 100 | $ 1.77 | |||
| 250 | $ 1.56 | |||
| 500 | $ 1.49 | |||
| 1000 | $ 1.45 | |||
Description
General part information
PI6CBF18501 Series
The PI6CBF18501 is a 5-output, very low power PCIe Gen1/Gen2/Gen3/Gen4 clock buffer. The device takes a reference input to fanout 100MHz low power differential HCSL outputs with on-chip terminations. The on-chip termination saves 24 external resistors and makes layout easier. Individual OE pins for each output provideseasier power management. The device uses Diodes' proprietary design to achieve very low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4 requirements. It provides various advanced options, such as different slew ratesand amplitudes through SMBus so users can easily configure the device to achieve the optimized performance for their individual boards.
Documents
Technical documentation and resources