
ZL40205LDF1
Active1:6 LVPECL BUFFER WITH INPUT TERMINATION
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ZL40205LDF1
Active1:6 LVPECL BUFFER WITH INPUT TERMINATION
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Technical Specifications
Parameters and characteristics for this part
Specification | ZL40205LDF1 |
---|---|
Differential - Input:Output [custom] | True |
Differential - Input:Output [custom] | True |
Frequency - Max [Max] | 750 MHz |
Input | LVCMOS, HCSL, CML, LVDS, LVPECL |
Mounting Type | Surface Mount |
Number of Circuits | 1 |
Operating Temperature [Max] | 85 °C |
Operating Temperature [Min] | -40 °C |
Output | LVPECL |
Package / Case | 32-VFQFN Exposed Pad |
Ratio - Input:Output [custom] | 1:6 |
Supplier Device Package | 32-QFN (5x5) |
Type | Fanout Buffer (Distribution) |
Voltage - Supply [Max] | 3.465 V |
Voltage - Supply [Min] | 2.375 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Distributor | Package | Quantity | $ | |
---|---|---|---|---|
Digikey | Cut Tape (CT) | 1 | $ 5.67 | |
25 | $ 4.73 | |||
100 | $ 4.58 | |||
Digi-Reel® | 1 | $ 5.67 | ||
25 | $ 4.73 | |||
100 | $ 4.58 | |||
Tape & Reel (TR) | 4000 | $ 4.58 | ||
Microchip Direct | T/R | 1 | $ 5.67 | |
25 | $ 4.73 | |||
100 | $ 4.29 | |||
1000 | $ 3.97 | |||
5000 | $ 3.77 |
ZL40205 Series
1:6 LVPECL Buffer with Input Termination
Part | Frequency - Max [Max] | Supplier Device Package | Ratio - Input:Output [custom] | Type | Package / Case | Mounting Type | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Number of Circuits | Output | Voltage - Supply [Min] | Voltage - Supply [Max] | Input | Operating Temperature [Max] | Operating Temperature [Min] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Microchip Technology ZL40205LDF1 | 750 MHz | 32-QFN (5x5) | 1:6 | Fanout Buffer (Distribution) | 32-VFQFN Exposed Pad | Surface Mount | 1 | LVPECL | 2.375 V | 3.465 V | CML, HCSL, LVCMOS, LVDS, LVPECL | 85 °C | -40 °C |
Description
General part information
ZL40205 Series
The ZL40204 is an LVPECL clock fanout buffer with six output clock drivers capable of operating at frequencies up to 750MHz.
Inputs to the ZL40204 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40204 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available.
The ZL40204 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.
Documents
Technical documentation and resources