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71V124 - Block Diagram

71V124SA12YGI

Obsolete
Renesas Electronics Corporation

3.3V 128K X 8 ASYNCHRONOUS STATIC RAM CENTER POWER & GROUND PINOUT

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71V124 - Block Diagram

71V124SA12YGI

Obsolete
Renesas Electronics Corporation

3.3V 128K X 8 ASYNCHRONOUS STATIC RAM CENTER POWER & GROUND PINOUT

Find alt

Description

General part information

71V124 Series

The 71V124 3.3V CMOS SRAM is organized as 128K x 8. The JEDEC center power/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.

Technical Specifications

Parameters and characteristics for this part

Specification71V124SA12YGI
Access Time12 ns
Memory Depth128 K
Memory FormatSRAM
Memory Interface (Type)Parallel
Memory Size1 Mbit
Memory TypeVolatile
Memory Width8 bit
Mounting TypeSurface Mount
Operating Temperature (Max)85 °C
Operating Temperature (Min)-40 °C
Package Length10.16 mm
Package Name32-BSOJ, 32-SOJ
Package Width10.16 mm
TechnologySRAM - Asynchronous
Voltage - Supply (Maximum)3.6 V
Voltage - Supply (Minimum)3 V
Write Cycle Time - Page12 ns
Write Cycle Time - Word12 ns

Pricing

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CAD

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Documents

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