
NUCLEO-L496ZG-P
ActiveDEVELOPMENT BOARD, STM32L496ZGTP MCU, SMPS, ARDUINO, ST ZIO AND MORPHO CONNECTIVITY
Deep-Dive with AI
Search across all available documentation for this part.

NUCLEO-L496ZG-P
ActiveDEVELOPMENT BOARD, STM32L496ZGTP MCU, SMPS, ARDUINO, ST ZIO AND MORPHO CONNECTIVITY
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | NUCLEO-L496ZG-P |
|---|---|
| Board Type | Evaluation Platform |
| Contents | Board(s) |
| Core Processor | ARM® Cortex®-M4 |
| Interconnect System | ST Zio, Arduino R3 Shield, ST Morpho |
| Mounting Type | Fixed |
| Platform | Nucleo-144 |
| Suggested Programming Environment | STM32Cube, Keil MDK, IAR EW |
| Type | MCU 32-Bit |
| Utilized IC / Part | STM32L496 |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Description
General part information
P-L496G-CELL02 Series
The STM32L496xx devices are ultra-low-power microcontrollers based on the high-performance Arm®Cortex®-M4 32-bit RISC core operating at a frequency of up to 80 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision that supports all Arm®single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.
The STM32L496xx devices embed high-speed memories (up to 1 Mbyte of flash memory, 320 Kbyte of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad SPI flash memories interface (available on all packages) and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.
The STM32L496xx devices embed several protection mechanisms for embedded flash memory and SRAM: readout protection, write protection, proprietary code readout protection and Firewall.
Documents
Technical documentation and resources