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859S0424I - Block Diagram

859S0424BGILFT

Obsolete
Renesas Electronics Corporation

4:4 DIFFERENTIAL-TO-LVPECL/LVDS CLOCK MULTIPLEXER

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859S0424I - Block Diagram

859S0424BGILFT

Obsolete
Renesas Electronics Corporation

4:4 DIFFERENTIAL-TO-LVPECL/LVDS CLOCK MULTIPLEXER

Find alt

Description

General part information

859S0424I Series

The 859S0424I is a 4:4 Differential-to-LVPECL/ LVDS Clock Multiplexer which can operate up to 3GHz. The outputs for this device can either be programmed to give LVPECL or LVDS levels. The 859S0424I has four selectable differential PCLKx, nPCLKx clock inputs. The PCLKx, nPCLKx input pairs can accept LVPECL, LVDS or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits.

Technical Specifications

Parameters and characteristics for this part

Specification859S0424BGILFT
Differential InputYes
Differential OutputYes
Frequency - Max3 GHz
InputLVDS, CML, LVPECL
Input Ratio4
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature (Max)85 °C
Operating Temperature (Min)-40 °C
OutputLVPECL, CML, LVDS
Output Ratio4
Package Length0.173 in
Package Name24-TSSOP
Package Width4.4 mm
TypeMultiplexer, Fanout Buffer (Distribution)
Voltage - Supply (Range 1 Maximum)2.625 V
Voltage - Supply (Range 1 Minimum)2.375 V
Voltage - Supply (Range 2 Maximum)3.465 V
Voltage - Supply (Range 2 Minimum)3.135 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources