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74LVC16827A - Block Diagram

74LVC16827APAG8

Obsolete
Renesas Electronics Corporation

3.3V CMOS 20-BIT BUFFER WITH 5.0V TOLERANT I/O

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74LVC16827A - Block Diagram

74LVC16827APAG8

Obsolete
Renesas Electronics Corporation

3.3V CMOS 20-BIT BUFFER WITH 5.0V TOLERANT I/O

Find alt

Description

General part information

74LVC16827A Series

The 74LVC16827A 20-bit buffer provides high-performance bus interface buffering for wide data/address paths or buses carrying parity and can operate as two 10-bit buffers or one 20-bit buffer. The 74LVC16827A buffer is ideally suited for driving high capacitance loads and low impedance backplanes. All pins can be driven from either 3.3V or 5V devices which allows the use of the device as a translator in a mixed 3.3V/5V supply system. The 74LVC16827A operates at -40C to +85C

Technical Specifications

Parameters and characteristics for this part

Specification74LVC16827APAG8
Current - Output High24 mA
Current - Output Low24 mA
Logic TypeBuffer, Non-Inverting
Mounting TypeSurface Mount
Number of Bits per Element10 bits
Number of Elements2
Operating Temperature (Max)85 °C
Operating Temperature (Min)-40 °C
Output Type3-State
Package Length0.24 in
Package Name56-TFSOP, 56-TSSOP
Package Width6.1 mm
Voltage - Supply (Maximum)3.6 V
Voltage - Supply (Minimum)2.7 V

Pricing

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CAD

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Documents

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