Zenode.ai Logo
Beta
K
74LVC1T45FX4-7 - 74LVC1G06FX4-7

74LVC1T45FX4-7

Active
Diodes Inc

BUS TRANSCEIVER, LVC/LCX/Z SERIES, 1-FUNC, 1-BIT, TRUE OUTPUT, CMOS, PBGA6, 1.40 X 0.90 MM, GREEN, CSP-6

Deep-Dive with AI

Search across all available documentation for this part.

74LVC1T45FX4-7 - 74LVC1G06FX4-7

74LVC1T45FX4-7

Active
Diodes Inc

BUS TRANSCEIVER, LVC/LCX/Z SERIES, 1-FUNC, 1-BIT, TRUE OUTPUT, CMOS, PBGA6, 1.40 X 0.90 MM, GREEN, CSP-6

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

Specification74LVC1T45FX4-7
Channel TypeBidirectional
Channels per Circuit1
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case6-XFDFN
Supplier Device PackageX2-DFN1409-6
Translator TypeVoltage Level
Voltage - VCCA [Max]5.5 V
Voltage - VCCA [Min]1.65 V
Voltage - VCCB [Max]5.5 V
Voltage - VCCB [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.27
10$ 0.19
25$ 0.17
100$ 0.14
250$ 0.13
500$ 0.12
1000$ 0.12
2500$ 0.12
Digi-Reel® 1$ 0.27
10$ 0.19
25$ 0.17
100$ 0.14
250$ 0.13
500$ 0.12
1000$ 0.12
2500$ 0.12
Tape & Reel (TR) 5000$ 0.11
10000$ 0.11
15000$ 0.10
25000$ 0.10
35000$ 0.10
50000$ 0.10

Description

General part information

74LVC1T45 Series

The 74LVC1T45 is a single bit,dual supply translating transceiverwith 3-state outputs suitable for transmitting a single logic bit across different voltage domains. The A input/output pin is designed to track VCCA while the B input/output tracks VCCB. This arrangement allows for universal low-voltage translation between any voltages from 1.65V to 5.5V. The Direction pin (DIR) controls the direction of the transceiver and in a logic voltage related to VCCA. When a high logic level is applied to DIR the A pin becomes an input and the B pin becomes the output. Conversely the roles of A and B are reversed when DIR is asserted low. The 3-state feature occurs when either of the power supply voltages are zero. This is also an Ioff feature and allows for the output to remain in a high impedance state with both power supplies at 0V preventing and damaging backflow currents and providing power down electrical isolation up to 5.5V as not to interfere with any logic activity on pin A or B.