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72V2103 - Block Diagram

72V2103L7-5BC

Obsolete
Renesas Electronics Corporation

128K X 18 / 256K X 9 SUPERSYNC II FIFO, 3.3V

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72V2103 - Block Diagram

72V2103L7-5BC

Obsolete
Renesas Electronics Corporation

128K X 18 / 256K X 9 SUPERSYNC II FIFO, 3.3V

Find alt

Description

General part information

72V2103 Series

The 72V2103 256K x 9/128K x 18 SuperSync II FIFO memory has flexible x9/x18 Bus-Matching on both read and write ports. The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated. SuperSync II FIFOs are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match buses of unequal sizes.

Technical Specifications

Parameters and characteristics for this part

Specification72V2103L7-5BC
Access Time5 ns
Bus DirectionalUni-Directional
Current - Supply (Max)35 mA
Data Rate133.3 MHz
Expansion TypeWidth, Depth
FunctionSynchronous
FWFT SupportYes
Memory Depth128 K
Memory Depth (Variant 2)256 K
Memory Size (Total)2.25 M
Memory Width18 bit
Memory Width (Variant 2)9 bit
Mounting TypeSurface Mount
Operating Temperature (Max)70 °C
Operating Temperature (Min)0 °C
Package / Case100-LBGA
Package Length11 mm
Package Name100-CABGA
Package Width11 mm
Programmable Flags SupportYes
Retransmit CapabilityYes
Voltage - Supply (Maximum)3.45 V
Voltage - Supply (Minimum)3.15 V

Pricing

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CAD

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Documents

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