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TPS3813J25DBVT - SOT-23-6 PKG

TPS3813J25DBVT

Active
Texas Instruments

VOLTAGE SUPERVISOR (RESET IC) WITH PROGRAMMABLE WINDOW WATCHDOG

TPS3813J25DBVT - SOT-23-6 PKG

TPS3813J25DBVT

Active
Texas Instruments

VOLTAGE SUPERVISOR (RESET IC) WITH PROGRAMMABLE WINDOW WATCHDOG

Technical Specifications

Parameters and characteristics commom to parts in this series

SpecificationTPS3813J25DBVTTPS3813 Series
Function-Power Supply Supervisor/Tracker/Sequencer
Grade-Automotive
Mounting TypeSurface MountSurface Mount
Number of Voltages Monitored11
Operating Temperature [Max]85 °C85 - 125 °C
Operating Temperature [Min]-40 °C-55 - -40 °C
OutputOpen Drain or Open CollectorOpen Drain or Open Collector
Package / CaseSOT-23-6SOT-23-6
Qualification-AEC-Q100
ResetActive LowActive Low
Reset Timeout [Min]20 ms20 ms
Supplied Contents-Board(s)
Supplier Device PackageSOT-23-6SOT-23-6
TypeSimple Reset/Power-On ResetSimple Reset/Power-On Reset, Power Management
Utilized IC / Part-TPS3813-Q1
Voltage - Threshold2.25 V2.25 - 4.55 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

TPS3813 Series

VOLTAGE SUPERVISOR (RESET IC) WITH PROGRAMMABLE WINDOW WATCHDOG 6-SOT-23 -40 TO 85

PartTypeMounting TypeNumber of Voltages MonitoredReset Timeout [Min]Package / CaseOutputResetVoltage - ThresholdOperating Temperature [Max]Operating Temperature [Min]Supplier Device PackageFunctionSupplied ContentsUtilized IC / PartGradeQualification
Texas Instruments
TPS3813K33DBVT
The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C. The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C.
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
2.93 V
85 °C
-40 °C
SOT-23-6
Texas Instruments
TPS3813L30DBVRG4
Supervisor Open Drain or Open Collector 1 Channel SOT-23-6
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
2.64 V
85 °C
-40 °C
SOT-23-6
Texas Instruments
TPS3813K33DBVRG4
Supervisor Open Drain or Open Collector 1 Channel SOT-23-6
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
2.93 V
85 °C
-40 °C
SOT-23-6
Texas Instruments
TPS3813K33DBVTG4
Supervisor Open Drain or Open Collector 1 Channel SOT-23-6
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
2.93 V
85 °C
-40 °C
SOT-23-6
Texas Instruments
TPS3813Q1EVM
TPS3813-Q1 Power Supply Supervisor/Tracker/Sequencer Power Management Evaluation Board
Power Management
Power Supply Supervisor/Tracker/Sequencer
Board(s)
TPS3813-Q1
Texas Instruments
TPS3813J25DBVT
The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C. The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C.
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
2.25 V
85 °C
-40 °C
SOT-23-6
Texas Instruments
TPS3813J25DBVR
The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C. The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C.
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
2.25 V
85 °C
-40 °C
SOT-23-6
Texas Instruments
TPS3813K33DBVR
The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C. The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C.
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
2.93 V
85 °C
-40 °C
SOT-23-6
Texas Instruments
TPS3813L30DBVT
The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C. The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C.
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
2.64 V
85 °C
-40 °C
SOT-23-6
Texas Instruments
TPS3813I50DBVT
The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C. The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET. The product spectrum is designed for supply voltages of 2.5V, 3V, 3.3V, and 5V. The circuits are available in a 6-pin SOT-23 package. The TPS3813xxx devices are characterized for operation over a temperature range of –40°C to 85°C.
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
4.55 V
85 °C
-40 °C
SOT-23-6
Texas Instruments
TPS3813I50QDBVRQ1
The TPS3813-Q1 supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, theRESETpin is asserted when the supply voltage (VDD) becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESETpin active as long as VDDremains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive (high) state to ensure proper system reset. The delay time, td= 25 ms typical, begins after VDDhas risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety-critical applications, the TPS3813-Q1 family of device s incorporate a window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting the WDT pin to GND or VDD, or by using an external capacitor. The lower limit, and thus the window ratio, is set by connecting the WDR pin to GND or VDD. TheRESETpin will assert a reset to the microcontroller if the watchdog is incorrectly serviced. The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The device s are available in a 6-pin SOT-23 package. The device s are characterized for operation over a temperature range of –40°C to 125°C. The TPS3813-Q1 supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, theRESETpin is asserted when the supply voltage (VDD) becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESETpin active as long as VDDremains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive (high) state to ensure proper system reset. The delay time, td= 25 ms typical, begins after VDDhas risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety-critical applications, the TPS3813-Q1 family of device s incorporate a window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting the WDT pin to GND or VDD, or by using an external capacitor. The lower limit, and thus the window ratio, is set by connecting the WDR pin to GND or VDD. TheRESETpin will assert a reset to the microcontroller if the watchdog is incorrectly serviced. The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The device s are available in a 6-pin SOT-23 package. The device s are characterized for operation over a temperature range of –40°C to 125°C.
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
4.55 V
125 °C
-40 °C
SOT-23-6
Automotive
AEC-Q100
Texas Instruments
TPS3813K33MDBVREP
Supervisor Open Drain or Open Collector 1 Channel SOT-23-6
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
2.93 V
125 °C
-55 C
SOT-23-6
Texas Instruments
TPS3813J25DBVRG4
Supervisor Open Drain or Open Collector 1 Channel SOT-23-6
Simple Reset/Power-On Reset
Surface Mount
1
20 ms
SOT-23-6
Open Drain or Open Collector
Active Low
2.25 V
85 °C
-40 °C
SOT-23-6

Description

General part information

TPS3813 Series

The TPS3813xxx family of supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems.

During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.

For safety critical applications the TPS3813xxx family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813xxx within this window not to assert a RESET.