
74LVC11D,118
ActiveNexperia USA Inc.
AND GATE, TRIPLE, 3 INPUT, 14 PINS, SOIC, 74LVC11

74LVC11D,118
ActiveNexperia USA Inc.
AND GATE, TRIPLE, 3 INPUT, 14 PINS, SOIC, 74LVC11
Description
General part information
74LVC11D Series
The 74LVC11 provides three 3-input AND functions.
Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC11D,118 |
|---|---|
| Current - Output High | 24 mA |
| Current - Output Low | 24 mA |
| Current - Quiescent (Max) | 10 µA |
| Input Logic Level - High (Max) | 2 V |
| Input Logic Level - High (Min) | 1.08 V |
| Input Logic Level - Low (Max) | 0.8 V |
| Input Logic Level - Low (Min) | 0.12 V |
| Logic Type | AND Gate |
| Max CL | 50 pF |
| Max Propagation Delay | 6.2 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 3 |
| Number of Inputs | 3 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -40 °C |
| Package Length | 0.154 in |
| Package Name | 14-SOIC, 14-SO |
| Package Width | 3.9 mm |
| Voltage - Supply (Maximum) | 3.6 V |
| Voltage - Supply (Minimum) | 1.2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Sign in to see pricing
Create a free account to access distributor pricing data.
CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
Datasheet
Questions about package outline drawings
Wave soldering profile
SO14; Reel pack for SMD, 13"; Q1/T1 product orientation
Footprint for reflow soldering
Power considerations when using CMOS and BiCMOS logic devices
Footprint for wave soldering
plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body
74LVC11D Nexperia Product Reliability
Nexperia package poster
Pin FMEA for LVC family
plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body