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SPC56AP60L3CEFAY - 100-LQFP

SPC56AP60L3CEFAY

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STMicroelectronics

IC MCU 32BIT 1MB FLASH 100LQFP

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SPC56AP60L3CEFAY - 100-LQFP

SPC56AP60L3CEFAY

Active
STMicroelectronics

IC MCU 32BIT 1MB FLASH 100LQFP

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationSPC56AP60L3CEFAY
ConnectivitySPI, CANbus, LINbus, UART/USART
Core Processore200z0h
Core Size32-Bit Single-Core
Data Converters [custom]10
Data Converters [custom]16
EEPROM Size64 K
Mounting TypeSurface Mount
Number of I/O49
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Oscillator TypeInternal
Package / Case100-LQFP
PeripheralsWDT, DMA, PWM, POR
Program Memory Size1 MB
Program Memory TypeFLASH
RAM Size80 K
Speed64 MHz
Supplier Device Package100-LQFP (14x14)
Voltage - Supply (Vcc/Vdd) [Max]5.5 V
Voltage - Supply (Vcc/Vdd) [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

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Description

General part information

SPC56L-Discovery Series

The Leopard series microcontrollers are system-on-chip devices that are built on Power Architecture technology and contain enhancements that improve the architecture’s fit in embedded applications, include additional instruction support for digital signal processing (DSP) and integrate technologies such as an enhanced time processor unit, enhanced queued analog-to-digital converter, Controller Area Network, and an enhanced modular input-output system.

The SPC56XL60/54 family of 32-bit microcontrollers is the latest achievement in integrated automotive application controllers. It belongs to an expanding range of automotive-focused products designed to address electrical hydraulic power steering (EHPS), electric power steering (EPS) and airbag applications. The advanced and cost-efficient host processor core of the SPC56XL60/54 automotive controller family complies with the Power Architecture embedded category. It operates at speeds as high as 120 MHz and offers high-performance processing optimized for low power consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and is supported with software drivers, operating systems and configuration code to assist with users’ implementations.

Documents

Technical documentation and resources