
71V2546S133BGI
Obsolete3.3V 128KX36 ZBT SYNCHRONOUS PIPELINED SRAM WITH 2.5V I/O

71V2546S133BGI
Obsolete3.3V 128KX36 ZBT SYNCHRONOUS PIPELINED SRAM WITH 2.5V I/O
Description
General part information
71V2546 Series
The 71V2546 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2546 has an on-chip burst counter. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.
Technical Specifications
Parameters and characteristics for this part
| Specification | 71V2546S133BGI |
|---|---|
| Access Time | 4.2 ns |
| Clock Frequency | 133 MHz |
| Memory Depth | 128 K |
| Memory Format | SRAM |
| Memory Interface (Type) | Parallel |
| Memory Size | 4.5 Mbit |
| Memory Type | Volatile |
| Memory Width | 36 bit |
| Mounting Type | Surface Mount |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | 119-BGA |
| Package Length | 14 mm |
| Package Name | 119-PBGA |
| Package Width | 22 mm |
| Technology | SDR (ZBT), SRAM - Synchronous |
| Voltage - Supply (Maximum) | 3.465 V |
| Voltage - Supply (Minimum) | 3.135 V |
Pricing
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