
TMS320DM6435ZWT6
DSP FIXED-POINT 32BIT 600MHZ 4800MIPS 361-PIN NFBGA TRAY
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TMS320DM6435ZWT6
DSP FIXED-POINT 32BIT 600MHZ 4800MIPS 361-PIN NFBGA TRAY
Deep-Dive with AI
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Distributor | Package | Quantity | $ | |
---|---|---|---|---|
Digikey | Tray | 1 | $ 40.33 | |
10 | $ 30.69 | |||
25 | $ 28.22 | |||
90 | $ 25.64 | |||
270 | $ 25.04 | |||
Texas Instruments | JEDEC TRAY (5+1) | 1 | $ 30.65 | |
100 | $ 27.24 | |||
250 | $ 22.40 | |||
1000 | $ 20.03 |
Description
General part information
TMS320DM6435 Series
The TMS320C64x+™ DSPs (including the TMS320DM6435 device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The DM6435 device is based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media applications. The C64x+™ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform. The C64x™ DSPs support added functionality and have an expanded instruction set from previous devices.
Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.
With performance of up to 4800 million instructions per second (MIPS) at a clock rate of 600 MHz, the C64x+ core offers solutions to high-performance DSP programming challenges. The DSP core possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x+ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units–two multipliers for a 32-bit result and six arithmetic logic units (ALUs). The eight functional units include instructions to accelerate the performance in video and imaging applications. The DSP core can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2400 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4800 MMACS. For more details on the C64x+ DSP, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732).
Documents
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