The 74AHC273-Q100; 74AHCT273-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW onMRforces the outputs LOW independently of clock and data inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.