Zenode.ai Logo
ZL40201LDG1 - VQFN / 16

ZL40201LDG1

Active
Microchip Technology

1:2 LVPECL BUFFER WITH INPUT TERMINATION

Deep-Dive with AI

Search across all available documentation for this part.

ZL40201LDG1 - VQFN / 16

ZL40201LDG1

Active
Microchip Technology

1:2 LVPECL BUFFER WITH INPUT TERMINATION

Technical Specifications

Parameters and characteristics commom to parts in this series

SpecificationZL40201LDG1ZL40201 Series
--
Differential - Input:Output [custom]TrueTrue
Differential - Input:Output [custom]TrueTrue
Frequency - Max [Max]750 MHz750 MHz
InputLVCMOS, HCSL, CML, LVDS, LVPECLLVCMOS, HCSL, CML, LVDS, LVPECL
Mounting TypeSurface MountSurface Mount
Number of Circuits11
Operating Temperature [Max]85 °C85 °C
Operating Temperature [Min]-40 °C-40 °C
OutputLVPECLLVPECL
Package / Case16-VFQFN Exposed Pad16-VFQFN Exposed Pad
Ratio - Input:Output [custom]1:21:2
Supplier Device Package16-QFN (3x3)16-QFN (3x3)
TypeFanout Buffer (Distribution)Fanout Buffer (Distribution)
Voltage - Supply [Max]3.465 V3.465 V
Voltage - Supply [Min]2.375 V2.375 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 714$ 3.06
Microchip DirectTRAY 1$ 3.81
25$ 3.18
100$ 2.89
1000$ 2.67
5000$ 2.54

ZL40201 Series

1:2 LVPECL Buffer with Input Termination

PartFrequency - Max [Max]Voltage - Supply [Min]Voltage - Supply [Max]Differential - Input:Output [custom]Differential - Input:Output [custom]InputOutputRatio - Input:Output [custom]Supplier Device PackageTypePackage / CaseNumber of CircuitsOperating Temperature [Max]Operating Temperature [Min]Mounting Type
Microchip Technology
ZL40201LDF1
Microchip Technology
ZL40201LDG1
750 MHz
2.375 V
3.465 V
CML, HCSL, LVCMOS, LVDS, LVPECL
LVPECL
1:2
16-QFN (3x3)
Fanout Buffer (Distribution)
16-VFQFN Exposed Pad
1
85 °C
-40 °C
Surface Mount

Description

General part information

ZL40201 Series

The ZL40201 is an LVPECL clock fan out buffer with two identical output clock drivers capable of operating at frequencies up to 750MHz.

The ZL40201 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40201 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.

The ZL40201 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.