Zenode.ai Logo

Description

General part information

9DB1933 Series

The 9DB1933 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB1933 is driven by a differential SRC output pair from an IDT 932S421, 932SQ420, or equivalent, main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking.

Technical Specifications

Parameters and characteristics for this part

Specification9DB1933AKLF
Differential InputYes
Differential OutputYes
Frequency - Max166 MHz
InputClock
Input Ratio1
Main PurposePCI Express (PCIe)
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature (Max)70 °C
Operating Temperature (Min)0 °C
OutputHCSL
Output Ratio19
Package / Case72-VFQFN Exposed Pad
Package Length10 mm
Package Name72-VFQFPN
Package Width10 mm
PLLYes
Voltage - Supply (Maximum)3.465 V
Voltage - Supply (Minimum)3.135 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Sign in to see pricing

Create a free account to access distributor pricing data.

CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources