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74LVCH16374APVG - 74LVCH16374A - Block Diagram

74LVCH16374APVG

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Renesas Electronics Corporation

3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, 5.0V TOLERANT I/O, AND BUS-HOLD

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74LVCH16374APVG - 74LVCH16374A - Block Diagram

74LVCH16374APVG

Active
Renesas Electronics Corporation

3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, 5.0V TOLERANT I/O, AND BUS-HOLD

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Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyBulk 278$ 1.08
Tube 1$ 1.53
10$ 1.37
30$ 1.30
120$ 1.07
270$ 1.00
510$ 0.88

Description

General part information

74LVCH16374 Series

The 74LVCH16374A 16-bit edge-triggered D-type register is ideal for use as a buffer register for data synchronization and storage. Flow-through organization of signal pins simplifies layout. All pins of the 74LVCH16374A can be driven from either 3.3V or 5V devices which allows the use of this device as a translator in a mixed 3.3V/5V supply system. The 74LVCH16374A has "bus-hold" which prevents floating inputs and eliminates the need for pull-up/down resistors. The 74LVCH16374A operates at -40C to +85C