
AD9525BCPZ
ActiveLOW JITTER CLOCK GENERATOR EIGHT LVPECL OUTPUTS

AD9525BCPZ
ActiveLOW JITTER CLOCK GENERATOR EIGHT LVPECL OUTPUTS
Description
General part information
AD9525 Series
The AD9525 is designed to support converter clock requirements for long-term evolution (LTE) and multicarrier GSM base station designs.The AD9525 provides a low power, multioutput, clock distribution function with low jitter performance, along with an on-chip PLL that can be used with an external VCO or VCXO. The VCO input and eight LVPECL outputs can operate up to a frequency of 3.6 GHz. All outputs share a common divider that can provide a division of 1 to 6.The AD9525 offers a dedicated output that can be used to provide a programmable signal for resetting or synchronizing a data converter. The output signal is activated by a SPI write.The AD9525 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. The external VCXO or VCO can have an operating voltage of up to 5.5 V.The AD9525 operates over the extended industrial temperature range of −40°C to +85°C.ApplicationsLTE and multicarrier GSM base stationsClocking high speed ADCs, DACsATE and high performance instrumentation40/100Gb/s OTN Line Side ClockingCable/DOCSIS CMTS ClockingTest and Measurement
Technical Specifications
Parameters and characteristics for this part
| Specification | AD9525BCPZ |
|---|---|
| Differential Input | Yes |
| Differential Output | Yes |
| Divider | Yes |
| Frequency - Max | 3.6 GHz |
| Input | Clock |
| Input Ratio | 2 |
| Mounting Type | Surface Mount |
| Multiplier | No |
| Number of Circuits | 1 |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Output | LVPECL, CMOS |
| Output Ratio | 9 |
| Package / Case | 48-WFQFN Exposed Pad, CSP |
| Package Length | 7 mm |
| Package Name | 48-LFCSP |
| Package Width | 7 mm |
| PLL | Yes with Bypass |
| Type | Clock Generator |
| Voltage - Supply (Maximum) | 3.465 V |
| Voltage - Supply (Minimum) | 3.135 V |
Pricing
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