74LVC74APW-Q100J

Active

Nexperia USA Inc.

DUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE-EDGE TRIGGER

Find alt

Alpha

74LVC74APW-Q100J

Active

Nexperia USA Inc.

DUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE-EDGE TRIGGER

Find alt

Alpha

Description Specifications Series Pricing CAD Documents

Description

General part information

74LVC74APW-Q100 Series

The 74LVC74A-Q100 is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQoutputs.

Technical Specifications

Parameters and characteristics for this part

Specification	74LVC74APW-Q100J

Clock Frequency	150 MHz
Current - Output High	24 mA
Current - Output Low	24 mA
Current - Quiescent (Iq)	10 µA
Function	Set(Preset) and Reset
Grade	Automotive
Input Capacitance	4 pF
Max CL	50 pF
Max Propagation Delay	5.2 ns
Mounting Type	Surface Mount
Number of Bits per Element	1 bits
Number of Elements	2
Operating Temperature (Max)	125 °C
Operating Temperature (Min)	-40 °C
Output Type	Complementary
Package Length	0.173 in
Package Name	14-TSSOP
Package Width	4.4 mm
Qualification	AEC-Q100
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply (Maximum)	3.6 V
Voltage - Supply (Minimum)	1.2 V

74LVC74APW-Q100 Series

Dual D-type flip-flop with set and reset; positive-edge trigger

Part	Number of Elements	Qualification	Current - Output Low	Current - Output High	Max Propagation Delay	Max CL	Voltage - Supply (Minimum)	Voltage - Supply (Maximum)	Function	Mounting Type	Operating Temperature (Max)	Operating Temperature (Min)	Current - Quiescent (Iq)	Output Type	Clock Frequency	Number of Bits per Element	Trigger Type	Package Width	Package Name	Package Length	Type	Grade	Input Capacitance
Nexperia USA Inc. 74LVC74APW-Q100J	2	AEC-Q100	24 mA	24 mA	5.2 ns	50 pF	1.2 V	3.6 V	Set(Preset) and Reset	Surface Mount	125 °C	-40 °C	10 µA	Complementary	150 MHz	1 bits	Positive Edge	4.4 mm	14-TSSOP	0.173 in	D-Type	Automotive	4 pF

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Create a free account to access distributor pricing data.

CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

Datasheet

plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body

Power considerations when using CMOS and BiCMOS logic devices

Pin FMEA for LVC family

Footprint for wave soldering

TSSOP14; Reel pack for SMD, 13"; Q1/T1 product orientation

plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body

Nexperia package poster

74LVC74APW-Q100 Nexperia Product Reliability