The 9ZML1255 is a second generation of enhanced performance DB1200ZL derivative. The device features both PLL and Bypass modes for flexibility. The PLL has a low noise PLL that can be used as a PCIe clock jitter cleaner. The device supports PCIe Gen1–5 and more complex architectures like SRIS and SRNS clocking. 9ZML1255 also features an SMBus Write Lockout pin for increased device and system security.

For information regarding evaluation boards and material, please contact your localsalesrepresentative.