
74LVC11PW-Q100J
ActiveNexperia USA Inc.
IC GATE AND 3CH 3-INP 14TSSOP

74LVC11PW-Q100J
ActiveNexperia USA Inc.
IC GATE AND 3CH 3-INP 14TSSOP
Description
General part information
74LVC11PW-Q100 Series
The 74LVC11-Q100 provides three 3-input AND functions.
Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC11PW-Q100J |
|---|---|
| Current - Output High | 24 mA |
| Current - Output Low | 24 mA |
| Current - Quiescent (Max) | 10 µA |
| Grade | Automotive |
| Input Logic Level - High (Max) | 2 V |
| Input Logic Level - High (Min) | 1.08 V |
| Input Logic Level - Low (Max) | 0.8 V |
| Input Logic Level - Low (Min) | 0.12 V |
| Logic Type | AND Gate |
| Max CL | 50 pF |
| Max Propagation Delay | 6.2 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 3 |
| Number of Inputs | 3 |
| Operating Temperature (Max) | 125 °C |
| Operating Temperature (Min) | -40 °C |
| Package Length | 0.173 in |
| Package Name | 14-TSSOP |
| Package Width | 4.4 mm |
| Qualification | AEC-Q100 |
| Voltage - Supply (Maximum) | 3.6 V |
| Voltage - Supply (Minimum) | 1.2 V |
Pricing
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CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources
Datasheet
plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body
plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body
Power considerations when using CMOS and BiCMOS logic devices
Pin FMEA for LVC family
74LVC11PW-Q100 Nexperia Product Reliability
Nexperia package poster
Footprint for wave soldering
TSSOP14; Reel pack for SMD, 13"; Q1/T1 product orientation