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ADSP-BF526KBCZ-4

ADSP-BF526KBCZ-4

Active
Analog Devices Inc./Maxim Integrated

LOW POWER BLACKFIN PROCESSOR WITH ADVANCED PERIPHERALS AND LOW STANDBY POWER

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ADSP-BF526KBCZ-4

ADSP-BF526KBCZ-4

Active
Analog Devices Inc./Maxim Integrated

LOW POWER BLACKFIN PROCESSOR WITH ADVANCED PERIPHERALS AND LOW STANDBY POWER

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Description

General part information

ADSP-BF526 Series

The high performance 16/32-bit Blackfin embedded processor core, the flexible cache architecture, the enhanced DMA subsystem, and the dynamic power management (DPM) functionality allow system designers a flexible platform to address a wide range of portable applications, including consumer, communications and industrial/instrumentation.With the combination of peripherals which enable glue-less connectivity to networked devices such as Ethernet or WiFi 802.11 a/b/g modules and power efficient signal processing, the ADSP-BF526 is well suited to IP connected applications such as VoIP Phone or IP Camera.The VoIP challenge to the embedded-system designer is to choose a processing solution that is cost-effective, easy to deploy and scaleable in performance across market spaces. A "sweet spot" embedded-solution approach is to design with a platform that can implement a low channel count basic VoIP solution, yet retain sufficient capacity for value added capabilities and services – such as video, music, imaging and system control. Unlike traditional VoIP embedded solutions that utilize two processor cores to provide VoIP functionality, the ADSP-BF526 provides a convergent solution in a unified core architecture that allows voice and video signal processing concurrent with RISC MCU processing to handle network and user-interface demands. This unique ability to offer full VoIP functionality on a single convergent processor provides for a unified software development environment, faster system debugging and deployment, and lower overall system cost.IP protection has become a necessary part of today’s embedded computing applications. The ADSP-BF526 provides a security scheme which balances flexibility and upgradeability with performance through the inclusion of a firmware-based solution including OTP (One Time Programmable) memory to enable users to implement private keys for secure access to program code.

Technical Specifications

Parameters and characteristics for this part

SpecificationADSP-BF526KBCZ-4
Clock Rate (Frequency)400 MHz
InterfaceEthernet, I2C, UART, SPORT, PPI, SPI, USB, DMA
Mounting TypeSurface Mount
Non-Volatile Memory Size32 kB
Non-Volatile Memory TypeROM
On-Chip RAM132 kB
Operating Temperature (Max)70 °C
Operating Temperature (Min)0 °C
Package / CaseCSPBGA, 289-LFBGA
Package Length12 mm
Package Name289-CSPBGA
Package Width12 mm
TypeFixed Point
Voltage - Core1.3 V
Voltage - I/O (Option 1)1.8 V
Voltage - I/O (Option 2)2.5 V
Voltage - I/O (Option 3)3.3 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

ADSP-BF526KBCZ-4 | Datasheet
EE-269: A Beginner’s Guide to Ethernet 802.3 (Rev.1)
VisualDSP++®5.0 Quick Installation Reference Card (Rev.3.1)
ADSP-BF526 EZ-Board®Evaluation System Manual (Rev.1.2)
EE-340: Connecting SHARC®and Blackfin®Processors over SPI (Rev.1)
HPUSB, USB, and HPPCI Emulator User’s Guide (Rev.3.2)
EE-347: Formatted Print to a UART Terminal with Blackfin® Processors (Rev.3)
EE-307: Blackfin® Processor Troubleshooting Tips Using VisualDSP++® Tools (Rev.1)
EE-309: Power Mode Transition Times of Blackfin® Processors (Rev.1)
VisualDSP++®5.0 Licensing Guide (Rev.1.4)
EE-192: Using C To Create Interrupt-Driven Systems On Blackfin® Processors
EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev.1)
EE-276: Video Framework Considerations for Image Processing on Blackfin® Processors (Rev.1)
EE-334: Using Blackfin®Processor Hibernate State for Low Standby Power (Rev.1)
ADSP-BF5xx/ADSP-BF60x Blackfin® Processor Programming Reference (Rev.2.2)
EE-304: Using the Blackfin® Processor SPORT to Emulate a SPI Interface (Rev.1)
EE-271: Using Cache Memory on Blackfin® Processors (Rev.2)
EE-104: Setting Up Streams with the VisualDSP Debugger
VisualDSP++®5.0 Kernel (VDK) Users Guide (Rev.3.5)
VisualDSP++®5.0 Product Release Bulletin (Rev.3.0)
EE-323: Implementing Dynamically Loaded Software Modules (Rev.1)
EE-344: Using the NAND Flash Controller on Blackfin Processors (Rev.1)
EE-337: Host DMA Port on ADSP-BF52x and ADSP-BF54x Blackfin® Processors (Rev.1)
VisualDSP++®5.0 Linker and Utilities Manual (Rev.3.5)
VisualDSP++®5.0 Loader and Utilities Manual (Rev.2.5)
VisualDSP++®5.0 C/C++ Compiler and Library Manual for Blackfin Processors (Rev.5.4)
EE-301: Video Templates for Developing Multimedia Applications on Blackfin® Processors (Rev.1)
Blackfin Processor Family Product Highlight
EE-308: Estimating and Optimizing Booting Time for Blackfin® Processors (Rev.1)
EE-341: Expert Pin Multiplexing Plug-in for Blackfin® Processors (Rev.3)
EE-306: PGO Linker - A Code Layout Tool for Blackfin Processors (Rev.1)
EE-325: Interfacing Atmel Fingerprint Sensor AT77C104B with Blackfin® Processors (Rev.1)
EE-183: Rational Sample Rate Conversion with Blackfin® Processors (Rev.5)
VisualDSP++®5.0 Getting Started Guide (Rev.3.0)
EE-333: Interfacing Blackfin® Processors to Winbond W25X16 SPI Flash Devices (Rev.1)
EE-234: Interfacing T1/E1 Transceivers/Framers to Blackfin® Processors via the Serial Port (Rev.1)
Blackfin®/SHARC®USB EZ-Extender®Manual (Rev.1.1)
EE-128: DSP in C++: Calling Assembly Class Member Functions From C++
EE-302: Interfacing ADSP-BF53x Blackfin® Processors to NAND FLASH Memory (Rev.1)
ADSP-BF52x Blackfin®Processor Hardware Reference (Rev.1.2)
Package Drawing - 289-Ball CSPBGA (12mm x 12mm x 1.26mm)
EE-339: Using External Switching Regulators with Blackfin® Processors (Rev.1)
EE-110: A Quick Primer on ELF and DWARF File Formats
EE-149: Tuning C Source Code for the Blackfin® Processor Compiler
EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14)
VisualDSP++®5.0 Users Guide (Rev.3.0)
ICE-100B Emulator User’s Guide (Rev.1.1)
EE-281: Hardware Design Checklist for the Blackfin® Processors (Rev.2)
EE-197: ADSP-BF531/532/533 Blackfin® Processor Multi-cycle Instructions and Latencies
ICE-1000/ICE-2000 Emulator User’s Guide (Rev.1.2)
EE-68: Analog Devices JTAG Emulation Technical Reference (Rev.10)
EE-185: Fast Floating-Point Arithmetic Emulation on Blackfin® Processors (Rev.4)
VisualDSP++®5.0 Device Drivers and System Services Manual for Blackfin Processors (Rev.4.3)
EE-204: Blackfin® Processor SCCB Software Interface for Configuring I2C® Slave Devices (Rev.2)
EE-213: Host Communication via the Asynchronous Memory Interface for Blackfin® Processors (Rev.2)
EE-335: Interfacing SD Cards with Blackfin Processors (Rev.1)
EE-312: Building Complex VDK/LwIP Applications Using Blackfin® Processors (Rev.2)
EE-303: Using VisualDSP++® Thread-Safe Libraries with a Third-Party RTOS (Rev.1)
EE-257: A Boot Compression/Decompression Algorithm for Blackfin® Processors (Rev.1)
EE-326: Blackfin® Processor and SDRAM Technology (Rev.2)
EE-235: An Introduction to Scripting in VisualDSP++® (Rev.1)
EE-350: Seamlessly Interfacing MEMS Microphones with Blackfin Processors (Rev.1)
Blackfin®Landscape LCD EZ-Extender®Manual (Rev.1.1)
EE-324: System Optimization Techniques for Blackfin® Processors (Rev.1)
EE-311: VisualDSP++® Flash Programmer API for Blackfin® Processors (Rev.1)
EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev.1)
EE-236: Real-Time Solutions Using Mixed-Signal Front-End Devices with the Blackfin®Processor (Rev.1)
VisualDSP++®5.0 Assembler and Preprocessor Manual (Rev.3.4)