M74HC280B1R
ObsoleteIC PARITY GENERATOR 9-BIT 14DIP
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M74HC280B1R
ObsoleteIC PARITY GENERATOR 9-BIT 14DIP
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Technical Specifications
Parameters and characteristics for this part
| Specification | M74HC280B1R |
|---|---|
| Current - Output High, Low [custom] | 5.2 mA |
| Current - Output High, Low [custom] | 5.2 mA |
| Mounting Type | Through Hole |
| Number of Circuits | 9-Bit |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 14-DIP |
| Package / Case [x] | 0.3 " |
| Package / Case [y] | 7.62 mm |
| Supplier Device Package | 14-DIP |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 0.98 | |
| 10 | $ 0.88 | |||
| 25 | $ 0.83 | |||
| 100 | $ 0.68 | |||
| 250 | $ 0.64 | |||
| 500 | $ 0.56 | |||
| 1000 | $ 0.45 | |||
Description
General part information
M74HC280 Series
The M74HC280 is a high-speed CMOS 9-bit parity generator fabricated with silicon gate C2MOS technology.
It is composed of nine data inputs (A to I) and odd/even parity outputs (ΣODD and ΣEVEN). The nine data inputs control the output conditions. When the number of high-level inputs is odd, ΣODD outputs are kept high and ΣEVEN outputs are kept low. Conversely, when the number of high-level outputs is even, ΣEVEN outputs are kept high and ΣODD outputs are kept low. The IC generates either odd or even parity making the application flexible. The word-length capability is easily expanded by cascading.
All inputs are equipped with protection circuits against static discharge and transient excess voltage.
Documents
Technical documentation and resources