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SY89826LHY-TR - TQFP / 64

SY89826LHY-TR

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Microchip Technology

CLOCK FANOUT BUFFER 22-OUT 2-IN 1:22 64-PIN TQFP EP T/R

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SY89826LHY-TR - TQFP / 64

SY89826LHY-TR

Active
Microchip Technology

CLOCK FANOUT BUFFER 22-OUT 2-IN 1:22 64-PIN TQFP EP T/R

Deep-Dive with AI

Technical Specifications

Parameters and characteristics commom to parts in this series

SpecificationSY89826LHY-TRSY89826L Series
Differential - Input:Output-True
Differential - Input:Output-True
Frequency - Max-1 GHz
Input-LVPECL, LVDS
Mounting Type-Surface Mount
null-
Number of Circuits-1
Operating Temperature-85 °C
Operating Temperature--40 °C
Output-LVDS
Package / Case-64-TQFP Exposed Pad
Ratio - Input:Output-2:22
Supplier Device Package-64-TQFP-EP (10x10)
Type-Fanout Buffer (Distribution), Multiplexer, Translator
Voltage - Supply-3.6 V
Voltage - Supply-3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
Microchip DirectT/R 1$ 27.84
25$ 23.20
100$ 21.10
1000$ 20.37
5000$ 20.13

SY89826L Series

IC CLK BUFFER 2:22 1GHZ 64TQFP

PartRatio - Input:OutputSupplier Device PackageOutputDifferential - Input:Output [custom]Differential - Input:Output [custom]Voltage - Supply [Max]Voltage - Supply [Min]Mounting TypeInputFrequency - Max [Max]Number of CircuitsPackage / CaseOperating Temperature [Max]Operating Temperature [Min]Type
Microchip Technology
SY89826LHY
2:22
64-TQFP-EP (10x10)
LVDS
3.6 V
3 V
Surface Mount
LVDS, LVPECL
1 GHz
1
64-TQFP Exposed Pad
85 °C
-40 °C
Fanout Buffer (Distribution), Multiplexer, Translator
Microchip Technology
SY89826LHY-TR

Description

General part information

SY89826L Series

The SY89826L is a precision fanout buffer with 22 differential LVDS (Low Voltage Differential Swing) output pairs. The part is designed for use in low voltage 3.3V applications that require a large number of outputs to drive precisely aligned, ultra low-skew signals to their destination.The input is multiplexed from either LVDS or LVPECL (Low Voltage Positive Emitter Coupled Logic) by the CLK\_SEL pin. The OE (Output Enable) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control.The SY89826L features a low pin-to-pin skew of less than 50ps--performance previously unachievable in a standard product having such a high number of outputs.The SY89826L is available in a single space saving package, enabling a lower overall cost solution.

Documents

Technical documentation and resources