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CD74HCT75E

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Texas Instruments

HIGH SPEED CMOS LOGIC DUAL 2-BIT BISTABLE TRANSPARENT LATCH

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CD74HCT75E - https://ti.com/content/dam/ticom/images/products/package/n/n0016a.png

CD74HCT75E

Active
Texas Instruments

HIGH SPEED CMOS LOGIC DUAL 2-BIT BISTABLE TRANSPARENT LATCH

Technical Specifications

Parameters and characteristics for this part

SpecificationCD74HCT75E
Circuit2:2
Current - Output High, Low4 mA, 4 mA
Delay Time - Propagation11 ns
Independent Circuits2
Logic TypeD-Type Transparent Latch
Mounting TypeThrough Hole
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Output TypeDifferential
Package / Case0.3 in, 7.62 mm
Package / Case16-DIP
Supplier Device Package16-PDIP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 0.82
10$ 0.73
25$ 0.70
100$ 0.57
250$ 0.53
500$ 0.47
1000$ 0.44
Texas InstrumentsTUBE 1$ 1.09
100$ 0.84
250$ 0.62
1000$ 0.44

CD74HCT75 Series

High Speed CMOS Logic Dual 2-Bit Bistable Transparent Latch

PartSupplier Device PackageIndependent CircuitsCircuitVoltage - Supply [Max]Voltage - Supply [Min]Output TypeDelay Time - PropagationPackage / CasePackage / CaseCurrent - Output High, LowMounting TypeLogic TypeOperating Temperature [Min]Operating Temperature [Max]
Texas Instruments
CD74HCT75E
16-PDIP
2
2:2
5.5 V
4.5 V
Differential
11 ns
0.3 in, 7.62 mm
16-DIP
4 mA, 4 mA
Through Hole
D-Type Transparent Latch
-55 °C
125 °C

Description

General part information

CD74HCT75 Series

The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.

The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.

Documents

Technical documentation and resources